mops.c 55 KB

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  1. /* mops.c - handle pseudo-ops */
  2. #include "syshead.h"
  3. #include "const.h"
  4. #include "type.h"
  5. #include "globvar.h"
  6. #include "opcode.h"
  7. #include "scan.h"
  8. #undef EXTERN
  9. #define EXTERN
  10. #include "address.h"
  11. #define is8bitadr(offset) ((offset_t) offset < 0x100)
  12. #define is8bitsignedoffset(offset) ((offset_t) (offset) + 0x80 < 0x100)
  13. #define pass2 (pass==last_pass)
  14. FORWARD void mshort2 P((void));
  15. FORWARD reg_pt regchk P((void));
  16. FORWARD void reldata P((void));
  17. FORWARD void segadj P((void));
  18. #ifdef I80386
  19. #define iswordadr(offset) ((offset_t) (offset) < 0x10000L)
  20. #define iswordoffset(offset) ((offset_t) (offset) + 0x8000L < 0x10000L)
  21. #define iswordorswordoffset(offset) ((offset_t) (offset) + 0xFFFFL < 0x1FFFEL)
  22. #define BYTE_SEGWORD 0x00
  23. #define isspecreg(r) ((r) >= CR0REG && (r) <= TR7REG)
  24. #define BASE_MASK 0x07
  25. #define BASE_SHIFT 0
  26. #define INDEX_MASK 0x38
  27. #define INDEX_SHIFT 3
  28. #define MOD_MASK 0xC0
  29. # define REG_MOD 0xC0
  30. # define MEM0_MOD 0x00
  31. # define MEM1_MOD 0x40
  32. # define MEM2_MOD 0x80
  33. #define REG_MASK 0x38
  34. #define REG_SHIFT 3
  35. #define RM_MASK 0x07
  36. #define RM_SHIFT 0
  37. # define D16_RM 0x06
  38. # define D32_RM 0x05
  39. # define SIB_NOBASE 0x05
  40. # define SIB_RM 0x04
  41. #define SREG_MASK 0x38
  42. #define SREG_SHIFT 3
  43. #define SS_MASK 0xC0
  44. #define SS_SHIFT 6
  45. #define SEGMOV 0x04
  46. #define SIGNBIT 0x02
  47. #define TOREGBIT 0x02
  48. #define WORDBIT 0x01
  49. PRIVATE opcode_t baseind16[] =
  50. {
  51. 0x00, /* BP + BP, illegal */
  52. 0x00, /* BX + BP, illegal */
  53. 0x03, /* DI + BP */
  54. 0x02, /* SI + BP */
  55. 0x00, /* BP + BX, illegal */
  56. 0x00, /* BX + BX, illegal */
  57. 0x01, /* DI + BX */
  58. 0x00, /* SI + BX */
  59. 0x03, /* BP + DI */
  60. 0x01, /* BX + DI */
  61. 0x00, /* DI + DI, illegal */
  62. 0x00, /* SI + DI, illegal */
  63. 0x02, /* BP + SI */
  64. 0x00, /* BX + SI */
  65. 0x00, /* DI + SI, illegal */
  66. 0x00, /* SI + SI, illegal */
  67. };
  68. PRIVATE opcode_t regbits[] =
  69. {
  70. 0x05 << REG_SHIFT, /* BP */
  71. 0x03 << REG_SHIFT, /* BX */
  72. 0x07 << REG_SHIFT, /* DI */
  73. 0x06 << REG_SHIFT, /* SI */
  74. 0x00 << REG_SHIFT, /* EAX */
  75. 0x05 << REG_SHIFT, /* EBP */
  76. 0x03 << REG_SHIFT, /* EBX */
  77. 0x01 << REG_SHIFT, /* ECX */
  78. 0x07 << REG_SHIFT, /* EDI */
  79. 0x02 << REG_SHIFT, /* EDX */
  80. 0x06 << REG_SHIFT, /* ESI */
  81. 0x04 << REG_SHIFT, /* ESP */
  82. 0x00 << REG_SHIFT, /* AX */
  83. 0x01 << REG_SHIFT, /* CX */
  84. 0x02 << REG_SHIFT, /* DX */
  85. 0x04 << REG_SHIFT, /* SP */
  86. 0x04 << REG_SHIFT, /* AH */
  87. 0x00 << REG_SHIFT, /* AL */
  88. 0x07 << REG_SHIFT, /* BH */
  89. 0x03 << REG_SHIFT, /* BL */
  90. 0x05 << REG_SHIFT, /* CH */
  91. 0x01 << REG_SHIFT, /* CL */
  92. 0x06 << REG_SHIFT, /* DH */
  93. 0x02 << REG_SHIFT, /* DL */
  94. 0x01 << REG_SHIFT, /* CS */
  95. 0x03 << REG_SHIFT, /* DS */
  96. 0x00 << REG_SHIFT, /* ES */
  97. 0x04 << REG_SHIFT, /* FS */
  98. 0x05 << REG_SHIFT, /* GS */
  99. 0x02 << REG_SHIFT, /* SS */
  100. 0x00 << REG_SHIFT, /* CR0 */
  101. 0x02 << REG_SHIFT, /* CR2 */
  102. 0x03 << REG_SHIFT, /* CR3 */
  103. 0x00 << REG_SHIFT, /* DR0 */
  104. 0x01 << REG_SHIFT, /* DR1 */
  105. 0x02 << REG_SHIFT, /* DR2 */
  106. 0x03 << REG_SHIFT, /* DR3 */
  107. 0x06 << REG_SHIFT, /* DR6 */
  108. 0x07 << REG_SHIFT, /* DR7 */
  109. 0x03 << REG_SHIFT, /* TR3 */
  110. 0x04 << REG_SHIFT, /* TR4 */
  111. 0x05 << REG_SHIFT, /* TR5 */
  112. 0x06 << REG_SHIFT, /* TR6 */
  113. 0x07 << REG_SHIFT, /* TR7 */
  114. 0x00 << REG_SHIFT, /* ST(0) */
  115. 0x01 << REG_SHIFT, /* ST(1) */
  116. 0x02 << REG_SHIFT, /* ST(2) */
  117. 0x03 << REG_SHIFT, /* ST(3) */
  118. 0x04 << REG_SHIFT, /* ST(4) */
  119. 0x05 << REG_SHIFT, /* ST(5) */
  120. 0x06 << REG_SHIFT, /* ST(6) */
  121. 0x07 << REG_SHIFT, /* ST(7) */
  122. };
  123. PRIVATE opsize_t regsize[] =
  124. {
  125. 2, /* BP */
  126. 2, /* BX */
  127. 2, /* DI */
  128. 2, /* SI */
  129. 4, /* EAX */
  130. 4, /* EBP */
  131. 4, /* EBX */
  132. 4, /* ECX */
  133. 4, /* EDI */
  134. 4, /* EDX */
  135. 4, /* ESI */
  136. 4, /* ESP */
  137. 2, /* AX */
  138. 2, /* CX */
  139. 2, /* DX */
  140. 2, /* SP */
  141. 1, /* AH */
  142. 1, /* AL */
  143. 1, /* BH */
  144. 1, /* BL */
  145. 1, /* CH */
  146. 1, /* CL */
  147. 1, /* DH */
  148. 1, /* DL */
  149. 2, /* CS */
  150. 2, /* DS */
  151. 2, /* ES */
  152. 2, /* FS */
  153. 2, /* GS */
  154. 2, /* SS */
  155. 4, /* CR0 */
  156. 4, /* CR2 */
  157. 4, /* CR3 */
  158. 4, /* DR0 */
  159. 4, /* DR1 */
  160. 4, /* DR2 */
  161. 4, /* DR3 */
  162. 4, /* DR6 */
  163. 4, /* DR7 */
  164. 4, /* TR3 */
  165. 4, /* TR4 */
  166. 4, /* TR5 */
  167. 4, /* TR6 */
  168. 4, /* TR7 */
  169. 10, /* ST(0) */
  170. 10, /* ST(1) */
  171. 10, /* ST(2) */
  172. 10, /* ST(3) */
  173. 10, /* ST(4) */
  174. 10, /* ST(5) */
  175. 10, /* ST(6) */
  176. 10, /* ST(7) */
  177. 0, /* NOREG */
  178. };
  179. PRIVATE opcode_t regsegword[] =
  180. {
  181. WORDBIT, /* BP */
  182. WORDBIT, /* BX */
  183. WORDBIT, /* DI */
  184. WORDBIT, /* SI */
  185. WORDBIT, /* EAX */
  186. WORDBIT, /* EBP */
  187. WORDBIT, /* EBX */
  188. WORDBIT, /* ECX */
  189. WORDBIT, /* EDI */
  190. WORDBIT, /* EDX */
  191. WORDBIT, /* ESI */
  192. WORDBIT, /* ESP */
  193. WORDBIT, /* AX */
  194. WORDBIT, /* CX */
  195. WORDBIT, /* DX */
  196. WORDBIT, /* SP */
  197. BYTE_SEGWORD, /* AH */
  198. BYTE_SEGWORD, /* AL */
  199. BYTE_SEGWORD, /* BH */
  200. BYTE_SEGWORD, /* BL */
  201. BYTE_SEGWORD, /* CH */
  202. BYTE_SEGWORD, /* CL */
  203. BYTE_SEGWORD, /* DH */
  204. BYTE_SEGWORD, /* DL */
  205. SEGMOV, /* CS */
  206. SEGMOV, /* DS */
  207. SEGMOV, /* ES */
  208. SEGMOV, /* FS */
  209. SEGMOV, /* GS */
  210. SEGMOV, /* SS */
  211. 0x20, /* CR0 */
  212. 0x20, /* CR2 */
  213. 0x20, /* CR3 */
  214. 0x21, /* DR0 */
  215. 0x21, /* DR1 */
  216. 0x21, /* DR2 */
  217. 0x21, /* DR3 */
  218. 0x21, /* DR6 */
  219. 0x21, /* DR7 */
  220. 0x24, /* TR3 */
  221. 0x24, /* TR4 */
  222. 0x24, /* TR5 */
  223. 0x24, /* TR6 */
  224. 0x24, /* TR7 */
  225. 0x00, /* ST(0) */
  226. 0x00, /* ST(1) */
  227. 0x00, /* ST(2) */
  228. 0x00, /* ST(3) */
  229. 0x00, /* ST(4) */
  230. 0x00, /* ST(5) */
  231. 0x00, /* ST(6) */
  232. 0x00, /* ST(7) */
  233. 0x00, /* NOREG */
  234. };
  235. PRIVATE opcode_t rm[] =
  236. {
  237. 0x05, /* BP */
  238. 0x03, /* BX */
  239. 0x07, /* DI */
  240. 0x06, /* SI */
  241. 0x00, /* EAX */
  242. 0x05, /* EBP */
  243. 0x03, /* EBX */
  244. 0x01, /* ECX */
  245. 0x07, /* EDI */
  246. 0x02, /* EDX */
  247. 0x06, /* ESI */
  248. 0x04, /* ESP */
  249. 0x00, /* AX */
  250. 0x01, /* CX */
  251. 0x02, /* DX */
  252. 0x04, /* SP */
  253. 0x04, /* AH */
  254. 0x00, /* AL */
  255. 0x07, /* BH */
  256. 0x03, /* BL */
  257. 0x05, /* CH */
  258. 0x01, /* CL */
  259. 0x06, /* DH */
  260. 0x02, /* DL */
  261. 0x01, /* CS */
  262. 0x03, /* DS */
  263. 0x00, /* ES */
  264. 0x04, /* FS */
  265. 0x05, /* GS */
  266. 0x02, /* SS */
  267. 0x00, /* CR0 */
  268. 0x00, /* CR2 */
  269. 0x00, /* CR3 */
  270. 0x00, /* DR0 */
  271. 0x00, /* DR1 */
  272. 0x00, /* DR2 */
  273. 0x00, /* DR3 */
  274. 0x00, /* DR6 */
  275. 0x00, /* DR7 */
  276. 0x00, /* TR3 */
  277. 0x00, /* TR4 */
  278. 0x00, /* TR5 */
  279. 0x00, /* TR6 */
  280. 0x00, /* TR7 */
  281. 0x00, /* ST(0) */
  282. 0x00, /* ST(1) */
  283. 0x00, /* ST(2) */
  284. 0x00, /* ST(3) */
  285. 0x00, /* ST(4) */
  286. 0x00, /* ST(5) */
  287. 0x00, /* ST(6) */
  288. 0x00, /* ST(7) */
  289. 0x04, /* null index reg for sib only */
  290. };
  291. PRIVATE opcode_t rmfunny[] =
  292. {
  293. 0x06, /* BP */
  294. 0x07, /* BX */
  295. 0x05, /* DI */
  296. 0x04, /* SI */
  297. };
  298. PRIVATE opcode_t segoverride[] =
  299. {
  300. 0x2E, /* CS */
  301. 0x3E, /* DS */
  302. 0x26, /* ES */
  303. 0x64, /* FS */
  304. 0x65, /* GS */
  305. 0x36, /* SS */
  306. };
  307. PRIVATE opcode_t ss[] = /* scale to ss bits */
  308. {
  309. 0x00, /* x0, illegal */
  310. 0x00 << SS_SHIFT, /* x1 */
  311. 0x01 << SS_SHIFT, /* x2 */
  312. 0x00, /* x3, illegal */
  313. 0x02 << SS_SHIFT, /* x4 */
  314. 0x00, /* x5, illegal */
  315. 0x00, /* x6, illegal */
  316. 0x00, /* x7, illegal */
  317. 0x03 << SS_SHIFT, /* x8 */
  318. };
  319. PRIVATE unsigned char calljmp_kludge;
  320. PRIVATE opcode_t direction;
  321. PRIVATE bool_t fpreg_allowed;
  322. PRIVATE opcode_t segword;
  323. /*
  324. Values of segword:
  325. BYTE_SEGWORD for byte ea's.
  326. SEGMOV for segment registers
  327. opcode for special registers
  328. WORDBIT for other word and dword ea's
  329. */
  330. PRIVATE struct ea_s source;
  331. PRIVATE struct ea_s source2;
  332. PRIVATE struct ea_s target;
  333. FORWARD void Eb P((struct ea_s *eap));
  334. FORWARD void Ew P((struct ea_s *eap));
  335. FORWARD void Ev P((struct ea_s *eap));
  336. FORWARD void Ex P((struct ea_s *eap));
  337. FORWARD void Gd P((struct ea_s *eap));
  338. FORWARD void Gw P((struct ea_s *eap));
  339. FORWARD void Gv P((struct ea_s *eap));
  340. FORWARD void Gx P((struct ea_s *eap));
  341. FORWARD void buildea P((struct ea_s *eap));
  342. FORWARD void buildfloat P((void));
  343. FORWARD void buildfreg P((void));
  344. FORWARD void buildimm P((struct ea_s *eap, bool_pt signflag));
  345. FORWARD void buildregular P((void));
  346. FORWARD void buildsegword P((struct ea_s *eap));
  347. FORWARD void buildunary P((opcode_pt opc));
  348. FORWARD opsize_pt displsize P((struct ea_s *eap));
  349. FORWARD reg_pt fpregchk P((void));
  350. FORWARD bool_pt getaccumreg P((struct ea_s *eap));
  351. FORWARD void getbinary P((void));
  352. FORWARD bool_pt getdxreg P((struct ea_s *eap));
  353. FORWARD void getea P((struct ea_s *eap));
  354. FORWARD void getimmed P((struct ea_s *eap, count_t immed_count));
  355. FORWARD void getindirect P((struct ea_s *eap));
  356. FORWARD void getshift P((struct ea_s *eap));
  357. FORWARD reg_pt indregchk P((reg_pt matchreg));
  358. FORWARD void kgerror P((char * err_str));
  359. FORWARD void lbranch P((int backamount));
  360. FORWARD void notbytesize P((struct ea_s *eap));
  361. FORWARD void notimmed P((struct ea_s *eap));
  362. FORWARD void notindirect P((struct ea_s *eap));
  363. FORWARD void notsegorspecreg P((struct ea_s *eap));
  364. FORWARD void yesimmed P((struct ea_s *eap));
  365. FORWARD void yes_samesize P((void));
  366. PRIVATE void Eb(eap)
  367. register struct ea_s *eap;
  368. {
  369. Ex(eap);
  370. if (eap->size != 0x1)
  371. {
  372. #ifndef NODEFAULTSIZE
  373. if (eap->size == 0x0)
  374. eap->size = 0x1;
  375. else
  376. #endif
  377. kgerror(ILL_SIZE);
  378. }
  379. }
  380. PRIVATE void Ew(eap)
  381. register struct ea_s *eap;
  382. {
  383. Ex(eap);
  384. if (eap->size != 0x2)
  385. {
  386. #ifndef NODEFAULTSIZE
  387. if (eap->size == 0x0)
  388. eap->size = 0x2;
  389. else
  390. #endif
  391. kgerror(ILL_SIZE);
  392. }
  393. }
  394. PRIVATE void Ev(eap)
  395. register struct ea_s *eap;
  396. {
  397. Ex(eap);
  398. notbytesize(eap);
  399. }
  400. PRIVATE void Ex(eap)
  401. register struct ea_s *eap;
  402. {
  403. getea(eap);
  404. notimmed(eap);
  405. notsegorspecreg(eap);
  406. }
  407. PRIVATE void Gd(eap)
  408. register struct ea_s *eap;
  409. {
  410. Gx(eap);
  411. if (eap->size != 0x4)
  412. kgerror(ILL_SIZE);
  413. }
  414. PRIVATE void Gw(eap)
  415. register struct ea_s *eap;
  416. {
  417. Gx(eap);
  418. if (eap->size != 0x2)
  419. kgerror(ILL_SIZE);
  420. }
  421. PRIVATE void Gv(eap)
  422. register struct ea_s *eap;
  423. {
  424. Gx(eap);
  425. notbytesize(eap);
  426. }
  427. PRIVATE void Gx(eap)
  428. register struct ea_s *eap;
  429. {
  430. Ex(eap);
  431. notindirect(eap);
  432. }
  433. PRIVATE void buildea(eap)
  434. register struct ea_s *eap;
  435. {
  436. opsize_t asize;
  437. ++mcount;
  438. lastexp = eap->displ;
  439. if (eap->indcount == 0x0)
  440. postb = REG_MOD | rm[eap->base];
  441. else
  442. {
  443. if (eap->base == NOREG)
  444. {
  445. if (eap->index == NOREG)
  446. {
  447. if ((asize = displsize(eap)) > 0x2)
  448. postb = D32_RM;
  449. else
  450. postb = D16_RM;
  451. }
  452. else
  453. {
  454. asize = 0x4;
  455. postb = SIB_NOBASE; /* for sib later */
  456. }
  457. }
  458. else
  459. {
  460. if (eap->base > MAX16BITINDREG)
  461. {
  462. asize = 0x4;
  463. postb = rm[eap->base];
  464. }
  465. else
  466. {
  467. asize = 0x2;
  468. if (!(lastexp.data & UNDBIT) &&
  469. !iswordorswordoffset(lastexp.offset))
  470. error(ABOUNDS);
  471. if (eap->index == NOREG)
  472. postb = rmfunny[eap->base];
  473. else if (eap->base <= MAX16BITINDREG)
  474. postb = baseind16[eap->base + 0x4 * eap->index];
  475. }
  476. }
  477. needcpu(asize==4?3:0);
  478. if (asize != defsize)
  479. aprefix = 0x67;
  480. if (eap->base == NOREG)
  481. mcount += asize;
  482. else if (lastexp.data & (FORBIT | RELBIT | UNDBIT) ||
  483. !is8bitsignedoffset(lastexp.offset))
  484. {
  485. postb |= MEM2_MOD;
  486. mcount += asize;
  487. }
  488. else if (lastexp.offset != 0x0 ||
  489. (eap->base == BPREG && eap->index == NOREG) ||
  490. eap->base == EBPREG)
  491. {
  492. postb |= MEM1_MOD;
  493. ++mcount;
  494. }
  495. if (asize > 0x2 && (eap->base == ESPREG || eap->index != NOREG))
  496. {
  497. sib = ss[eap->scale] |
  498. (rm[eap->index] << INDEX_SHIFT) |
  499. (postb & RM_MASK);
  500. postb = (postb & MOD_MASK) | SIB_RM;
  501. ++mcount;
  502. }
  503. }
  504. }
  505. PRIVATE void buildfloat()
  506. {
  507. if (mcount != 0x0)
  508. {
  509. buildea(&source);
  510. oprefix = 0x0;
  511. postb |= (opcode & 0x07) << REG_SHIFT;
  512. opcode = ESCAPE_OPCODE_BASE | ((opcode & 0x70) >> 0x4);
  513. }
  514. }
  515. PRIVATE void buildfreg()
  516. {
  517. mcount += 0x2;
  518. oprefix = 0x0;
  519. postb = REG_MOD | ((opcode & 0x07) << REG_SHIFT) | (target.base - ST0REG);
  520. opcode = ESCAPE_OPCODE_BASE | ((opcode & 0x70) >> 0x4);
  521. }
  522. PRIVATE void buildimm(eap, signflag)
  523. register struct ea_s *eap;
  524. bool_pt signflag;
  525. {
  526. immadr = eap->displ;
  527. immcount = eap->size;
  528. if (!(immadr.data & (FORBIT | RELBIT | UNDBIT)))
  529. {
  530. if (immcount == 0x1)
  531. {
  532. if ((offset_t) (immadr.offset + 0x80) >= 0x180)
  533. datatoobig();
  534. }
  535. else if (signflag && is8bitsignedoffset(immadr.offset))
  536. {
  537. opcode |= SIGNBIT;
  538. immcount = 0x1;
  539. }
  540. else if (immcount == 0x2)
  541. {
  542. if ((offset_t) (immadr.offset + 0x8000L) >= 0x18000L)
  543. datatoobig();
  544. }
  545. }
  546. }
  547. PRIVATE void buildregular()
  548. {
  549. if (mcount != 0x0)
  550. {
  551. buildea(&target);
  552. postb |= regbits[source.base];
  553. }
  554. }
  555. /* Check size and build segword. */
  556. PRIVATE void buildsegword(eap)
  557. register struct ea_s *eap;
  558. {
  559. if (eap->size == 0x0)
  560. #ifdef NODEFAULTSIZE
  561. kgerror(SIZE_UNK);
  562. #else
  563. eap->size = defsize;
  564. #endif
  565. if (eap->indcount != 0x0 || eap->base == NOREG)
  566. {
  567. segword = WORDBIT;
  568. if (eap->size == 0x1)
  569. segword = BYTE_SEGWORD;
  570. }
  571. else
  572. segword = regsegword[eap->base];
  573. }
  574. PRIVATE void buildunary(opc)
  575. opcode_pt opc;
  576. {
  577. if (mcount != 0x0)
  578. {
  579. buildea(&target);
  580. postb |= opcode;
  581. opcode = opc;
  582. }
  583. }
  584. PRIVATE opsize_pt displsize(eap)
  585. register struct ea_s *eap;
  586. {
  587. opsize_t asize;
  588. asize = defsize;
  589. if (!(eap->displ.data & UNDBIT))
  590. {
  591. if (asize > 0x2)
  592. {
  593. if (!(eap->displ.data & (FORBIT | RELBIT)) &&
  594. iswordadr(eap->displ.offset))
  595. asize = 0x2;
  596. }
  597. else if (!iswordorswordoffset(eap->displ.offset))
  598. /* should really use iswordadr() */
  599. /* but compiler generates signed offsets */
  600. {
  601. if (!(eap->displ.data & (FORBIT | RELBIT)))
  602. asize = 0x4;
  603. else if (pass2)
  604. error(ABOUNDS);
  605. }
  606. }
  607. return asize;
  608. }
  609. PRIVATE reg_pt fpregchk()
  610. {
  611. reg_pt fpreg;
  612. fpreg_allowed = TRUE;
  613. fpreg = regchk();
  614. fpreg_allowed = FALSE;
  615. if (fpreg != ST0REG)
  616. return NOREG;
  617. getsym();
  618. if (sym == LPAREN)
  619. {
  620. getsym();
  621. if (sym != INTCONST || (unsigned) number >= 0x8)
  622. error(ILL_FP_REG);
  623. else
  624. {
  625. fpreg += number;
  626. getsym();
  627. if (sym != RPAREN)
  628. error(RPEXP);
  629. else
  630. getsym();
  631. }
  632. }
  633. return fpreg;
  634. }
  635. PRIVATE bool_pt getaccumreg(eap)
  636. register struct ea_s *eap;
  637. {
  638. if ((eap->base = regchk()) != AXREG && eap->base != ALREG
  639. && eap->base != EAXREG)
  640. return FALSE;
  641. getsym();
  642. if ((eap->size = regsize[eap->base]) > 0x1 && eap->size != defsize)
  643. oprefix = 0x66;
  644. return TRUE;
  645. }
  646. /*
  647. Get binary ea's in target & source (flipped if direction is set).
  648. Put size in source if not already.
  649. Initialise direction, segword, bump mcount.
  650. */
  651. PRIVATE void getbinary()
  652. {
  653. ++mcount;
  654. getea(&target);
  655. if (target.indcount == 0x0 && target.base == NOREG)
  656. {
  657. error(ILL_IMM_MODE);
  658. target.base = AXREG;
  659. target.size = defsize;
  660. }
  661. getcomma();
  662. getea(&source);
  663. if (source.size == 0x0)
  664. source.size = target.size;
  665. else if (target.size != 0x0 && target.size != source.size)
  666. {
  667. kgerror(MISMATCHED_SIZE);
  668. return;
  669. }
  670. if (source.indcount == 0x0 && regsegword[target.base] < SEGMOV)
  671. direction = 0x0;
  672. else if (target.indcount == 0x0 && regsegword[source.base] < SEGMOV)
  673. {
  674. struct ea_s swap;
  675. direction = TOREGBIT;
  676. swap = source;
  677. source = target;
  678. target = swap;
  679. }
  680. else if (target.indcount != 0x0)
  681. {
  682. kgerror(ILL_IND_TO_IND);
  683. return;
  684. }
  685. else
  686. {
  687. kgerror(ILL_SEG_REG);
  688. return;
  689. }
  690. buildsegword(&source);
  691. }
  692. PRIVATE bool_pt getdxreg(eap)
  693. register struct ea_s *eap;
  694. {
  695. if ((eap->base = regchk()) != DXREG)
  696. return FALSE;
  697. getsym();
  698. return TRUE;
  699. }
  700. /* parse effective address */
  701. /*
  702. Syntax is restrictive in that displacements must be in the right spots
  703. and will not be added up.
  704. optional size-type prefix, which is
  705. BYTE
  706. BYTE PTR
  707. WORD
  708. WORD PTR
  709. DWORD
  710. DWORD PTR
  711. PTR
  712. reg
  713. segreg
  714. [scaled index]
  715. where scaled index =
  716. indreg
  717. indreg*scale
  718. indreg+indreg
  719. indreg+indreg*scale
  720. [scaled index+displ]
  721. [scaled index-displ]
  722. optional-immediate-prefix displ[scaled index]
  723. [displ]
  724. optional-imediate-prefix displ
  725. (scaled index) -- anachronism
  726. optional-imediate-prefix displ(scaled index) -- anachronism
  727. */
  728. PRIVATE void getea(eap)
  729. register struct ea_s *eap;
  730. {
  731. bool_t leading_displ;
  732. bool_t leading_immed;
  733. register struct sym_s *symptr;
  734. leading_immed = leading_displ = lastexp.data = eap->indcount
  735. = lastexp.offset = 0x0;
  736. eap->index = eap->base = NOREG;
  737. eap->scale = 0x1;
  738. eap->size = mnsize; /* 0x1 for byte ops, else 0x0 */
  739. if (sym == IDENT)
  740. {
  741. if ((symptr = gsymptr)->type & MNREGBIT)
  742. {
  743. if (symptr->data & SIZEBIT)
  744. {
  745. getsym();
  746. if (symptr->value_reg_or_op.op.opcode == 0x0)
  747. eap->indcount = 0x2 - calljmp_kludge;
  748. else
  749. {
  750. if (eap->size != 0x0)
  751. {
  752. if (eap->size != symptr->value_reg_or_op.op.opcode)
  753. error(MISMATCHED_SIZE);
  754. }
  755. else
  756. eap->size = symptr->value_reg_or_op.op.opcode;
  757. if (eap->size > 0x1 && eap->size != defsize)
  758. oprefix = 0x66;
  759. if (sym == IDENT &&
  760. (symptr = gsymptr)->type & MNREGBIT &&
  761. symptr->data & SIZEBIT &&
  762. symptr->value_reg_or_op.op.routine == PTROP)
  763. {
  764. getsym();
  765. eap->indcount = 0x2 - calljmp_kludge;
  766. }
  767. }
  768. }
  769. }
  770. if( last_pass == 1 )
  771. if (!(symptr->type & (LABIT | MACBIT | MNREGBIT | VARBIT)))
  772. symptr->data |= FORBIT; /* show seen in advance */
  773. }
  774. if ((eap->base = regchk()) != NOREG)
  775. {
  776. getsym();
  777. if (eap->indcount != 0x0)
  778. {
  779. error(ILL_IND_PTR);
  780. eap->indcount = 0x0;
  781. }
  782. if (eap->size != 0x0 && eap->size != regsize[eap->base])
  783. error(MISMATCHED_SIZE);
  784. if ((eap->size = regsize[eap->base]) > 0x1 && eap->size != defsize)
  785. oprefix = 0x66;
  786. eap->displ = lastexp;
  787. needcpu(eap->size==4?3:0);
  788. return;
  789. }
  790. if (sym != lindirect)
  791. {
  792. if (sym == IMMEDIATE || sym == STAR)
  793. {
  794. /* context-sensitive, STAR means signed immediate here */
  795. leading_immed = TRUE;
  796. getsym();
  797. }
  798. leading_displ = TRUE;
  799. expres();
  800. eap->displ = lastexp;
  801. }
  802. if (sym == lindirect)
  803. {
  804. getsym();
  805. eap->indcount = 0x2 - calljmp_kludge;
  806. if ((eap->base = indregchk((reg_pt) NOREG)) != NOREG)
  807. {
  808. if (eap->indcount == 0x0 && leading_displ)
  809. error(IND_REQ);
  810. getsym();
  811. if (sym == ADDOP)
  812. {
  813. getsym();
  814. if ((eap->index = indregchk(eap->base)) != NOREG)
  815. getsym();
  816. else
  817. {
  818. if (eap->indcount == 0x0)
  819. error(IND_REQ);
  820. if (leading_displ)
  821. error(REPEATED_DISPL);
  822. expres(); /* this eats ADDOP, SUBOP, MULOP */
  823. }
  824. }
  825. if (sym == STAR)
  826. {
  827. needcpu(3);
  828. /* context-sensitive, STAR means scaled here*/
  829. if (eap->index == NOREG && eap->base == ESPREG)
  830. {
  831. error(INDEX_REG_EXP);
  832. eap->base = EAXREG;
  833. }
  834. getsym();
  835. factor();
  836. chkabs();
  837. if (!(lastexp.data & UNDBIT) && lastexp.offset != 0x1)
  838. {
  839. if (eap->base <= MAX16BITINDREG ||
  840. (lastexp.offset != 0x2 && lastexp.offset != 0x4 &&
  841. lastexp.offset != 0x8))
  842. error(ILL_SCALE);
  843. else
  844. {
  845. eap->scale = lastexp.offset;
  846. if (eap->index == NOREG)
  847. {
  848. eap->index = eap->base;
  849. eap->base = NOREG;
  850. }
  851. }
  852. }
  853. lastexp.data = lastexp.offset = 0x0;
  854. }
  855. if ((sym == ADDOP || sym == SUBOP))
  856. {
  857. if (eap->indcount == 0x0)
  858. error(IND_REQ);
  859. if (leading_displ)
  860. error(REPEATED_DISPL);
  861. expres();
  862. }
  863. }
  864. else
  865. {
  866. if (leading_displ)
  867. error(REPEATED_DISPL);
  868. expres();
  869. }
  870. if (sym != rindirect)
  871. error(rindexp);
  872. else
  873. getsym();
  874. }
  875. /* RDB */
  876. else if (!leading_immed && defsize <= 0x2)
  877. eap->indcount = 0x1; /* compatibility kludge */
  878. if (!leading_displ)
  879. eap->displ = lastexp;
  880. needcpu(eap->size==4?3:0);
  881. }
  882. PRIVATE void getimmed(eap, immed_count)
  883. struct ea_s *eap;
  884. count_t immed_count;
  885. {
  886. getea(eap);
  887. yesimmed(eap);
  888. if (mcount != 0x0)
  889. {
  890. eap->size = immed_count;
  891. buildimm(eap, FALSE);
  892. }
  893. }
  894. PRIVATE void getindirect(eap)
  895. register struct ea_s *eap;
  896. {
  897. getea(eap);
  898. if (eap->indcount == 0x0)
  899. kgerror(IND_REQ);
  900. }
  901. PRIVATE void getshift(eap)
  902. register struct ea_s *eap;
  903. {
  904. getcomma();
  905. getea(eap);
  906. if (eap->base != CLREG)
  907. yesimmed(eap);
  908. }
  909. /*
  910. Check if current symbol is a compatible index register.
  911. Generate error if it is a reg but not a compatible index.
  912. Return register number (adjusted if necessary to a legal index) or NOREG.
  913. */
  914. PRIVATE reg_pt indregchk(matchreg)
  915. reg_pt matchreg;
  916. {
  917. reg_pt reg;
  918. if ((reg = regchk()) != NOREG)
  919. {
  920. switch (matchreg)
  921. {
  922. case BPREG:
  923. case BXREG:
  924. if (reg != DIREG && reg != SIREG)
  925. {
  926. reg = SIREG;
  927. error(INDEX_REG_EXP);
  928. }
  929. break;
  930. case DIREG:
  931. case SIREG:
  932. if (reg != BPREG && reg != BXREG)
  933. {
  934. reg = BXREG;
  935. error(INDEX_REG_EXP);
  936. }
  937. break;
  938. case NOREG:
  939. break;
  940. default:
  941. if (reg <= MAX16BITINDREG || reg == ESPREG)
  942. {
  943. reg = EAXREG;
  944. error(INDEX_REG_EXP);
  945. }
  946. break;
  947. }
  948. if (reg > MAXINDREG && calljmp_kludge == 0x0)
  949. {
  950. if (matchreg != NOREG)
  951. reg = EAXREG;
  952. else
  953. reg = BXREG;
  954. error(INDEX_REG_EXP);
  955. }
  956. }
  957. return reg;
  958. }
  959. PRIVATE void kgerror(err_str)
  960. char * err_str;
  961. {
  962. error(err_str);
  963. sprefix = oprefix = aprefix = mcount = 0x0;
  964. }
  965. PRIVATE void lbranch(backamount)
  966. int backamount;
  967. {
  968. mcount += defsize + 0x1;
  969. segadj();
  970. if (pass2)
  971. {
  972. reldata();
  973. if (!(lastexp.data & (RELBIT | UNDBIT)))
  974. {
  975. lastexp.offset = lastexp.offset - lc - lcjump;
  976. if ( last_pass<2 && backamount != 0x0 &&
  977. !(lastexp.data & IMPBIT) &&
  978. lastexp.offset + backamount < 0x80 + backamount)
  979. warning(SHORTB); /* -0x8? to 0x7F, warning */
  980. }
  981. }
  982. }
  983. /* BCC (long branches emulated by short branch over & long jump) */
  984. PUBLIC void mbcc()
  985. {
  986. getea(&target);
  987. if (target.indcount >= 0x2 || target.base != NOREG)
  988. kgerror(REL_REQ);
  989. else
  990. {
  991. #ifdef iscpu
  992. if (iscpu(3))
  993. #else
  994. if (defsize != 0x2)
  995. #endif
  996. {
  997. page = PAGE1_OPCODE;
  998. ++mcount;
  999. opcode += 0x10;
  1000. lbranch(0x84);
  1001. }
  1002. else
  1003. {
  1004. aprefix = opcode ^ 0x1; /* kludged storage for short branch
  1005. over */
  1006. oprefix = defsize + 0x1;
  1007. mcount += 0x2;
  1008. opcode = JMP_OPCODE;
  1009. lbranch(0x83);
  1010. mcount -= 0x2;
  1011. }
  1012. }
  1013. }
  1014. /* bswap r32 */
  1015. PUBLIC void mbswap()
  1016. {
  1017. needcpu(4);
  1018. ++mcount;
  1019. Gd(&target);
  1020. opcode |= rm[target.base];
  1021. }
  1022. /* BR, CALL, J, JMP */
  1023. PUBLIC void mcall()
  1024. {
  1025. opcode_pt far_diff;
  1026. bool_t indirect;
  1027. register struct sym_s *symptr;
  1028. far_diff = 0x0;
  1029. if (sym == IDENT && (symptr = gsymptr)->type & MNREGBIT &&
  1030. symptr->data & SIZEBIT )
  1031. {
  1032. if(symptr->value_reg_or_op.op.routine == FAROP)
  1033. {
  1034. far_diff = 0x8;
  1035. getsym();
  1036. }
  1037. if(symptr->value_reg_or_op.op.routine == WORDOP &&
  1038. opcode == JMP_SHORT_OPCODE)
  1039. {
  1040. opcode = JMP_OPCODE;
  1041. getsym();
  1042. }
  1043. }
  1044. indirect = FALSE;
  1045. if (asld_compatible && defsize <= 0x2)
  1046. {
  1047. calljmp_kludge = 0x2;
  1048. if (sym == INDIRECT)
  1049. {
  1050. calljmp_kludge = 0x0;
  1051. indirect = TRUE;
  1052. getsym();
  1053. }
  1054. }
  1055. getea(&target);
  1056. if (indirect && target.indcount == 0x1)
  1057. target.indcount = 0x2;
  1058. calljmp_kludge = 0x0;
  1059. if (sym == COLON)
  1060. {
  1061. int tsize = target.size?target.size:defsize;
  1062. if (opcode == JMP_SHORT_OPCODE)
  1063. opcode = JMP_OPCODE;
  1064. ++mcount;
  1065. yesimmed(&target);
  1066. getsym();
  1067. getea(&source);
  1068. yesimmed(&source);
  1069. if (mcount != 0x0)
  1070. {
  1071. if (opcode == JMP_OPCODE)
  1072. opcode = 0xEA;
  1073. else
  1074. opcode = 0x9A;
  1075. lastexp = source.displ;
  1076. if (!(lastexp.data & (FORBIT | RELBIT | UNDBIT)) &&
  1077. tsize == 0x2 &&
  1078. (offset_t) (lastexp.offset + 0x8000L) >= 0x18000L)
  1079. datatoobig();
  1080. mcount += tsize;
  1081. target.size = 0x2;
  1082. buildimm(&target, FALSE);
  1083. }
  1084. }
  1085. else if (target.indcount >= 0x2 || target.base != NOREG)
  1086. {
  1087. ++mcount;
  1088. notsegorspecreg(&target);
  1089. if (target.indcount == 0)
  1090. notbytesize(&target);
  1091. if (mcount != 0x0)
  1092. {
  1093. if (opcode == JMP_SHORT_OPCODE)
  1094. opcode = JMP_OPCODE;
  1095. buildea(&target);
  1096. if (opcode == JMP_OPCODE)
  1097. opcode = 0x20;
  1098. else
  1099. opcode = 0x10;
  1100. postb |= opcode + far_diff;
  1101. opcode = 0xFF;
  1102. }
  1103. }
  1104. else if (opcode == JMP_SHORT_OPCODE)
  1105. {
  1106. if (jumps_long &&
  1107. ((pass!=0 && !is8bitsignedoffset(lastexp.offset - lc - 2)) ||
  1108. (last_pass==1)))
  1109. {
  1110. opcode = JMP_OPCODE;
  1111. lbranch(0x83);
  1112. }
  1113. else
  1114. {
  1115. lastexp = target.displ;
  1116. if (lastexp.data & IMPBIT)
  1117. {
  1118. error(NONIMPREQ);
  1119. lastexp.data = FORBIT | UNDBIT;
  1120. }
  1121. mshort2();
  1122. }
  1123. }
  1124. else
  1125. lbranch(opcode == JMP_OPCODE ? 0x83 : 0x0);
  1126. }
  1127. /* CALLI, JMPI */
  1128. PUBLIC void mcalli()
  1129. {
  1130. bool_t indirect;
  1131. ++mcount;
  1132. indirect = FALSE;
  1133. if (sym == INDIRECT)
  1134. {
  1135. getsym();
  1136. indirect = TRUE;
  1137. }
  1138. getea(&target);
  1139. if (target.indcount >= 0x2 || target.base != NOREG)
  1140. indirect = TRUE;
  1141. if (indirect)
  1142. {
  1143. buildea(&target);
  1144. if (opcode == 0xEA)
  1145. opcode = 0x28;
  1146. else
  1147. opcode = 0x18;
  1148. postb |= opcode;
  1149. opcode = 0xFF;
  1150. }
  1151. else
  1152. {
  1153. int tsize = target.size?target.size:defsize;
  1154. getcomma();
  1155. getea(&source);
  1156. yesimmed(&source);
  1157. if (mcount != 0x0)
  1158. {
  1159. lastexp = target.displ;
  1160. if (!(lastexp.data & (FORBIT | RELBIT | UNDBIT)) &&
  1161. tsize == 0x2 &&
  1162. (offset_t) (lastexp.offset + 0x8000L) >= 0x18000L)
  1163. {
  1164. tsize=4;
  1165. if( tsize != defsize ) oprefix = 0x66;
  1166. /* datatoobig(); */
  1167. }
  1168. needcpu(tsize==4?3:0);
  1169. mcount += tsize;
  1170. source.size = 0x2;
  1171. buildimm(&source, FALSE);
  1172. }
  1173. }
  1174. }
  1175. /* DIV, IDIV, MUL */
  1176. PUBLIC void mdivmul()
  1177. {
  1178. if (getaccumreg(&source))
  1179. {
  1180. ++mcount;
  1181. getcomma();
  1182. Ex(&target);
  1183. yes_samesize();
  1184. buildunary(0xF6 | regsegword[source.base]);
  1185. }
  1186. else
  1187. mnegnot();
  1188. }
  1189. /* ENTER */
  1190. PUBLIC void menter()
  1191. {
  1192. ++mcount;
  1193. getimmed(&target, 0x2);
  1194. getcomma();
  1195. getimmed(&source, 0x1);
  1196. if (mcount != 0x0)
  1197. {
  1198. mcount += 2;
  1199. lastexp = target.displ; /* getimmed(&source) wiped it out */
  1200. }
  1201. needcpu(1);
  1202. }
  1203. /* arpl r/m16,r16 (Intel manual opcode chart wrongly says EwRw) */
  1204. PUBLIC void mEwGw()
  1205. {
  1206. ++mcount;
  1207. Ew(&target);
  1208. getcomma();
  1209. Gw(&source);
  1210. oprefix = 0x0;
  1211. buildregular();
  1212. }
  1213. /* [cmpxchg xadd] [r/m8,r8 r/m16,r16, r/m32,r32] */
  1214. PUBLIC void mExGx()
  1215. {
  1216. ++mcount;
  1217. Ex(&target);
  1218. getcomma();
  1219. Gx(&source);
  1220. yes_samesize();
  1221. opcode |= segword;
  1222. buildregular();
  1223. }
  1224. PUBLIC void mf_inher()
  1225. {
  1226. mcount += 0x2;
  1227. postb = REG_MOD | (opcode & ~REG_MOD);
  1228. opcode = ESCAPE_OPCODE_BASE | (opcode >> 0x6);
  1229. if (opcode == ESCAPE_OPCODE_BASE)
  1230. opcode = ESCAPE_OPCODE_BASE | 0x6; /* fix up encoding of fcompp */
  1231. }
  1232. /* [fldenv fnsave fnstenv frstor] mem */
  1233. PUBLIC void mf_m()
  1234. {
  1235. ++mcount;
  1236. getindirect(&source);
  1237. if (source.size != 0x0)
  1238. kgerror(ILL_SIZE);
  1239. buildfloat();
  1240. }
  1241. /* [fldcw fnstcw] mem2i */
  1242. PUBLIC void mf_m2()
  1243. {
  1244. ++mcount;
  1245. getindirect(&source);
  1246. if (source.size != 0x0 && source.size != 0x2)
  1247. kgerror(ILL_SIZE);
  1248. buildfloat();
  1249. }
  1250. /* fnstsw [mem2i ax] */
  1251. PUBLIC void mf_m2_ax()
  1252. {
  1253. if (getaccumreg(&target))
  1254. {
  1255. if (target.base != AXREG)
  1256. kgerror(ILLREG);
  1257. else
  1258. {
  1259. opcode = 0x74;
  1260. target.base = ST0REG; /* fake, really ax */
  1261. buildfreg();
  1262. }
  1263. }
  1264. else
  1265. mf_m2();
  1266. }
  1267. /* [fiadd ficom ficomp fidiv fidivr fimul fist fisub fisubr] [mem2i mem4i] */
  1268. PUBLIC void mf_m2_m4()
  1269. {
  1270. ++mcount;
  1271. getindirect(&source);
  1272. if (source.size == 0x0)
  1273. kgerror(SIZE_UNK);
  1274. else if (source.size == 0x2)
  1275. opcode |= 0x40;
  1276. else if (source.size != 0x4)
  1277. kgerror(ILL_SIZE);
  1278. buildfloat();
  1279. }
  1280. /* [fild fistp] [mem2i mem4i mem8i] */
  1281. PUBLIC void mf_m2_m4_m8()
  1282. {
  1283. ++mcount;
  1284. getindirect(&source);
  1285. if (source.size == 0x0)
  1286. kgerror(SIZE_UNK);
  1287. else if (source.size == 0x2)
  1288. opcode |= 0x40;
  1289. else if (source.size == 0x8)
  1290. opcode |= 0x45; /* low bits 0 -> 5 and 3 -> 7 */
  1291. else if (source.size != 0x4)
  1292. kgerror(ILL_SIZE);
  1293. buildfloat();
  1294. }
  1295. /* [fcom fcomp] [mem4r mem8r optional-st(i)] */
  1296. PUBLIC void mf_m4_m8_optst()
  1297. {
  1298. if (sym == EOLSYM)
  1299. {
  1300. target.base = ST1REG;
  1301. buildfreg();
  1302. }
  1303. else
  1304. mf_m4_m8_st();
  1305. }
  1306. /* [fadd fdiv fdivr fmul fsub fsubr] [mem4r mem8r st,st(i) st(i),st] */
  1307. PUBLIC void mf_m4_m8_stst()
  1308. {
  1309. target.base = fpregchk();
  1310. if (target.base != NOREG)
  1311. {
  1312. getcomma();
  1313. source.base = fpregchk();
  1314. if (source.base == NOREG)
  1315. {
  1316. error(FP_REG_REQ);
  1317. source.base = ST0REG;
  1318. }
  1319. if (target.base == ST0REG)
  1320. target.base = source.base;
  1321. else
  1322. {
  1323. if (source.base != ST0REG)
  1324. error(ILL_FP_REG_PAIR);
  1325. opcode |= 0x40;
  1326. if ((opcode & 0x07) >= 0x4)
  1327. opcode ^= 0x01; /* weird swap of fdiv/fdivr, fsub/fsubr */
  1328. }
  1329. buildfreg();
  1330. }
  1331. else
  1332. {
  1333. ++mcount;
  1334. getindirect(&source);
  1335. if (source.size == 0x0)
  1336. kgerror(SIZE_UNK);
  1337. else if (source.size == 0x8)
  1338. opcode |= 0x40;
  1339. else if (source.size != 0x4)
  1340. kgerror(ILL_SIZE);
  1341. buildfloat();
  1342. }
  1343. }
  1344. /* fst [mem4r mem8r st(i)] */
  1345. PUBLIC void mf_m4_m8_st()
  1346. {
  1347. target.base = fpregchk();
  1348. if (target.base != NOREG)
  1349. {
  1350. if (opcode == FST_ENCODED)
  1351. opcode |= 0x40;
  1352. buildfreg();
  1353. }
  1354. else
  1355. {
  1356. ++mcount;
  1357. getindirect(&source);
  1358. if (source.size == 0x0)
  1359. kgerror(SIZE_UNK);
  1360. else if (source.size == 0x8)
  1361. opcode |= 0x40;
  1362. else if (source.size != 0x4)
  1363. kgerror(ILL_SIZE);
  1364. buildfloat();
  1365. }
  1366. }
  1367. /* [fld fstp] [mem4r mem8r mem10r st(i)] */
  1368. PUBLIC void mf_m4_m8_m10_st()
  1369. {
  1370. target.base = fpregchk();
  1371. if (target.base != NOREG)
  1372. {
  1373. if (opcode == FSTP_ENCODED)
  1374. opcode |= 0x40;
  1375. buildfreg();
  1376. }
  1377. else
  1378. {
  1379. ++mcount;
  1380. getindirect(&source);
  1381. if (source.size == 0x0)
  1382. kgerror(SIZE_UNK);
  1383. else if (source.size == 0x8)
  1384. opcode |= 0x40;
  1385. else if (source.size == 0xA)
  1386. opcode |= 0x25; /* low bits 0 -> 5 and 3 -> 7 */
  1387. else if (source.size != 0x4)
  1388. kgerror(ILL_SIZE);
  1389. buildfloat();
  1390. }
  1391. }
  1392. /* [fbld fbstp] mem10r */
  1393. PUBLIC void mf_m10()
  1394. {
  1395. ++mcount;
  1396. getindirect(&source);
  1397. if (source.size != 0xA)
  1398. kgerror(ILL_SIZE);
  1399. buildfloat();
  1400. }
  1401. /* ffree st(i) */
  1402. PUBLIC void mf_st()
  1403. {
  1404. target.base = fpregchk();
  1405. if (target.base == NOREG)
  1406. kgerror(FP_REG_REQ);
  1407. buildfreg();
  1408. }
  1409. /* [fucom fucomp fxch] optional-st(i) */
  1410. PUBLIC void mf_optst()
  1411. {
  1412. if (sym == EOLSYM)
  1413. {
  1414. target.base = ST1REG;
  1415. buildfreg();
  1416. }
  1417. else
  1418. mf_st();
  1419. }
  1420. /* [faddp fdivp fdivrp fmulp fsubp fsubrp] st(i),st */
  1421. PUBLIC void mf_stst()
  1422. {
  1423. target.base = fpregchk();
  1424. if (target.base == NOREG)
  1425. {
  1426. kgerror(FP_REG_REQ);
  1427. return;
  1428. }
  1429. getcomma();
  1430. source.base = fpregchk();
  1431. if (source.base == NOREG)
  1432. {
  1433. kgerror(FP_REG_REQ);
  1434. return;
  1435. }
  1436. if (source.base != ST0REG)
  1437. {
  1438. kgerror(ILL_FP_REG);
  1439. return;
  1440. }
  1441. buildfreg();
  1442. }
  1443. PUBLIC void mf_w_inher()
  1444. {
  1445. sprefix = WAIT_OPCODE;
  1446. mf_inher();
  1447. }
  1448. /* [fsave fstenv] mem */
  1449. PUBLIC void mf_w_m()
  1450. {
  1451. sprefix = WAIT_OPCODE;
  1452. mf_m();
  1453. }
  1454. /* fstcw mem2i */
  1455. PUBLIC void mf_w_m2()
  1456. {
  1457. sprefix = WAIT_OPCODE;
  1458. mf_m2();
  1459. }
  1460. /* fstsw [mem2i ax] */
  1461. PUBLIC void mf_w_m2_ax()
  1462. {
  1463. sprefix = WAIT_OPCODE;
  1464. mf_m2_ax();
  1465. }
  1466. /* ADC, ADD, AND, CMP, OR, SBB, SUB, XOR */
  1467. PUBLIC void mgroup1()
  1468. {
  1469. getbinary();
  1470. notsegorspecreg(&source);
  1471. if (mcount != 0x0)
  1472. {
  1473. if (source.base == NOREG)
  1474. {
  1475. if (target.indcount == 0x0 && (target.base == ALREG ||
  1476. target.base == AXREG ||
  1477. (target.base == EAXREG &&
  1478. (source.displ.data & (FORBIT | RELBIT | UNDBIT) ||
  1479. !is8bitsignedoffset(source.displ.offset)))))
  1480. {
  1481. opcode |= 0x04 | segword;
  1482. buildimm(&source, FALSE);
  1483. }
  1484. else
  1485. {
  1486. buildunary(0x80 | segword);
  1487. buildimm(&source, TRUE);
  1488. }
  1489. }
  1490. else
  1491. {
  1492. opcode |= direction | segword;
  1493. buildregular();
  1494. }
  1495. }
  1496. }
  1497. /* RCL, RCR, ROL, ROR, SAL, SAR, SHL, SHR */
  1498. PUBLIC void mgroup2()
  1499. {
  1500. ++mcount;
  1501. Ex(&target);
  1502. buildsegword(&target);
  1503. getshift(&source);
  1504. if (mcount != 0x0)
  1505. {
  1506. buildunary(0xD0 | segword);
  1507. if (source.base == CLREG)
  1508. opcode |= 0x2;
  1509. else if (source.displ.offset != 0x1)
  1510. {
  1511. needcpu(1);
  1512. opcode -= 0x10;
  1513. source.size = 0x1;
  1514. buildimm(&source, FALSE);
  1515. }
  1516. }
  1517. }
  1518. /* LLDT, LTR, SLDT, STR, VERR, VERW */
  1519. PUBLIC void mgroup6()
  1520. {
  1521. needcpu(2);
  1522. ++mcount;
  1523. Ew(&target);
  1524. oprefix = 0x0;
  1525. buildunary(0x0);
  1526. }
  1527. /* INVLPG, LGDT, LIDT, LMSW, SGDT, SIDT, SMSW */
  1528. PUBLIC void mgroup7()
  1529. {
  1530. needcpu(2); /* I think INVLPG is actually 386 */
  1531. ++mcount;
  1532. if (opcode == 0x20 || opcode == 0x30)
  1533. {
  1534. Ew(&target);
  1535. oprefix = 0x0;
  1536. }
  1537. else
  1538. {
  1539. getindirect(&target);
  1540. oprefix = 0x0;
  1541. if (target.size != 0x0 && target.size != 0x6)
  1542. error(MISMATCHED_SIZE); /* XXX - size 6 wrong for INVLPG? */
  1543. }
  1544. buildunary(0x1);
  1545. }
  1546. /* BT, BTR, BTS, BTC */
  1547. PUBLIC void mgroup8()
  1548. {
  1549. needcpu(3);
  1550. ++mcount;
  1551. Ev(&target);
  1552. getcomma();
  1553. /* Gv or Ib */
  1554. getea(&source);
  1555. notindirect(&source);
  1556. notsegorspecreg(&source);
  1557. if (mcount != 0x0)
  1558. {
  1559. if (source.base == NOREG)
  1560. {
  1561. buildunary(0xBA);
  1562. source.size = 0x1;
  1563. buildimm(&source, TRUE);
  1564. }
  1565. else
  1566. {
  1567. yes_samesize();
  1568. opcode += 0x83;
  1569. buildregular();
  1570. }
  1571. }
  1572. }
  1573. /* BSF, BSR, LAR, LSL (Intel manual opcode chart wrongly says GvEw for L*) */
  1574. PUBLIC void mGvEv()
  1575. {
  1576. needcpu(2);
  1577. ++mcount;
  1578. Gv(&source);
  1579. getcomma();
  1580. Ev(&target);
  1581. yes_samesize();
  1582. buildregular();
  1583. }
  1584. /* bound [r16,m16&16 r32,m32&32] */
  1585. PUBLIC void mGvMa()
  1586. {
  1587. ++mcount;
  1588. Gv(&source);
  1589. getcomma();
  1590. getindirect(&target);
  1591. yes_samesize();
  1592. buildregular();
  1593. }
  1594. /* LDS, LES, LFS, LGS, LSS */
  1595. PUBLIC void mGvMp()
  1596. {
  1597. ++mcount;
  1598. Gv(&source);
  1599. getcomma();
  1600. getindirect(&target);
  1601. if (target.size != 0x0 && target.size != 0x2 + source.size)
  1602. error(MISMATCHED_SIZE);
  1603. buildregular();
  1604. }
  1605. /* IMUL */
  1606. PUBLIC void mimul()
  1607. {
  1608. ++mcount;
  1609. Ex(&target);
  1610. if (sym != COMMA)
  1611. {
  1612. buildsegword(&target);
  1613. buildunary(0xF6 | segword);
  1614. return;
  1615. }
  1616. getcomma();
  1617. notindirect(&target);
  1618. source = target; /* direction is swapped */
  1619. getea(&target);
  1620. notsegorspecreg(&target);
  1621. yes_samesize();
  1622. if (sym != COMMA && (target.indcount != 0x0 || target.base != NOREG))
  1623. {
  1624. needcpu(3);
  1625. page = PAGE1_OPCODE;
  1626. ++mcount;
  1627. opcode = 0xAF;
  1628. buildregular();
  1629. }
  1630. else
  1631. {
  1632. if (sym == COMMA)
  1633. {
  1634. getsym();
  1635. getea(&source2);
  1636. yesimmed(&source2);
  1637. }
  1638. else
  1639. {
  1640. source2 = target;
  1641. target = source;
  1642. }
  1643. source2.size = target.size;
  1644. if (is8bitsignedoffset(source2.displ.offset))
  1645. {
  1646. source2.size = 0x1;
  1647. opcode = 0x6B;
  1648. }
  1649. else
  1650. {
  1651. source2.size = target.size;
  1652. opcode = 0x69;
  1653. }
  1654. buildregular();
  1655. if (mcount != 0x0)
  1656. buildimm(&source2, FALSE);
  1657. }
  1658. }
  1659. /* IN */
  1660. PUBLIC void min()
  1661. {
  1662. ++mcount;
  1663. if (opcode & WORDBIT) /* inw; ind not supported */
  1664. mnsize = 0x2;
  1665. if (sym == EOLSYM && mnsize != 0x0)
  1666. target.size = mnsize;
  1667. else
  1668. {
  1669. if (getaccumreg(&target))
  1670. {
  1671. if (mnsize != 0x0 && regsize[target.base] != mnsize)
  1672. error(MISMATCHED_SIZE);
  1673. getcomma();
  1674. }
  1675. else
  1676. target.size = regsize[target.base = mnsize < 0x2 ? ALREG : AXREG];
  1677. opcode |= regsegword[target.base];
  1678. if (!getdxreg(&source))
  1679. {
  1680. getimmed(&source, 0x1);
  1681. opcode -= 0x8;
  1682. }
  1683. }
  1684. if (target.size > 0x1 && target.size != defsize)
  1685. oprefix = 0x66;
  1686. }
  1687. /* DEC, INC */
  1688. PUBLIC void mincdec()
  1689. {
  1690. ++mcount;
  1691. Ex(&target);
  1692. buildsegword(&target);
  1693. if (target.indcount == 0x0 && segword == WORDBIT)
  1694. opcode |= 0x40 | rm[target.base];
  1695. else
  1696. buildunary(0xFE | segword);
  1697. }
  1698. /* CBW, CWD, CMPSW, INSW, IRET, LODSW, POPA, POPF, PUSHA, PUSHF */
  1699. /* MOVSW, OUTSW, SCASW, STOSW */
  1700. PUBLIC void minher16()
  1701. {
  1702. minher();
  1703. if (defsize != 0x2)
  1704. oprefix = 0x66;
  1705. }
  1706. /* CWDE, CDQ, CMPSD, INSD, IRETD, LODSD, POPAD, POPFD, PUSHAD, PUSHFD */
  1707. /* MOVSD, OUTSD, SCASD, STOSD */
  1708. PUBLIC void minher32()
  1709. {
  1710. minher();
  1711. if (defsize != 0x4)
  1712. oprefix = 0x66;
  1713. needcpu(3);
  1714. }
  1715. /* AAD, AAM */
  1716. PUBLIC void minhera()
  1717. {
  1718. ++mcount;
  1719. if (sym == EOLSYM)
  1720. {
  1721. target.displ.offset = 0xA;
  1722. target.size = 0x1;
  1723. buildimm(&target, FALSE);
  1724. }
  1725. else
  1726. getimmed(&target, 0x1);
  1727. }
  1728. /* INT */
  1729. PUBLIC void mint()
  1730. {
  1731. ++mcount;
  1732. getimmed(&target, 0x1);
  1733. if (!(immadr.data & (FORBIT | RELBIT | UNDBIT)) &&
  1734. (opcode_t) immadr.offset == 0x3)
  1735. {
  1736. immcount = 0x0;
  1737. opcode = 0xCC;
  1738. }
  1739. }
  1740. /* JCC */
  1741. PUBLIC void mjcc()
  1742. {
  1743. /* First look for j* near */
  1744. if (sym == IDENT &&
  1745. gsymptr->type & MNREGBIT &&
  1746. gsymptr->data & SIZEBIT &&
  1747. gsymptr->value_reg_or_op.op.routine == WORDOP &&
  1748. opcode < 0x80)
  1749. {
  1750. getsym();
  1751. getea(&target);
  1752. if (target.indcount >= 0x2 || target.base != NOREG)
  1753. kgerror(REL_REQ);
  1754. else
  1755. {
  1756. needcpu(3);
  1757. page = PAGE1_OPCODE;
  1758. ++mcount;
  1759. opcode += 0x10;
  1760. lbranch(0x84);
  1761. }
  1762. }
  1763. else if (!jumps_long || opcode > 0x80) /* above 0x80 means loop, not long */
  1764. mshort();
  1765. else /* mbcc */
  1766. {
  1767. getea(&target);
  1768. lastexp = target.displ;
  1769. if ( (pass!=0 && !is8bitsignedoffset(lastexp.offset - lc - 2)) ||
  1770. last_pass==1)
  1771. {
  1772. if (target.indcount >= 0x2 || target.base != NOREG)
  1773. kgerror(REL_REQ);
  1774. aprefix = opcode ^ 0x1; /* kludged storage for short branch
  1775. over */
  1776. oprefix = defsize + 0x1;
  1777. mcount += 0x2;
  1778. opcode = JMP_OPCODE;
  1779. lbranch(0x83);
  1780. mcount -= 0x2;
  1781. }
  1782. else
  1783. {
  1784. /* 8 bit */
  1785. if (lastexp.data & IMPBIT)
  1786. {
  1787. error(NONIMPREQ);
  1788. lastexp.data = FORBIT | UNDBIT;
  1789. }
  1790. mshort2();
  1791. }
  1792. }
  1793. }
  1794. /* JCXZ, JECXZ */
  1795. PUBLIC void mjcxz()
  1796. {
  1797. if (opcode != defsize)
  1798. {
  1799. aprefix = 0x67;
  1800. ++mcount; /* quick fix - mshort() needs to know */
  1801. }
  1802. opcode = 0xE3;
  1803. mshort();
  1804. if (aprefix != 0x0)
  1805. --mcount; /* quick fix - main routine bumps it again */
  1806. }
  1807. /* LEA */
  1808. PUBLIC void mlea()
  1809. {
  1810. Gv(&source); /* back to front */
  1811. getcomma();
  1812. ++mcount;
  1813. getindirect(&target);
  1814. yes_samesize();
  1815. buildregular();
  1816. }
  1817. /* MOV */
  1818. PUBLIC void mmov()
  1819. {
  1820. getbinary();
  1821. if (segword >= SEGMOV)
  1822. {
  1823. oprefix = 0x0;
  1824. notimmed(&target); /* target is actually the source */
  1825. if (segword > SEGMOV) /* special reg */
  1826. notindirect(&target);
  1827. }
  1828. if (mcount != 0x0)
  1829. {
  1830. if (target.base == NOREG && target.index == NOREG &&
  1831. (source.base == ALREG || source.base == AXREG ||
  1832. source.base == EAXREG))
  1833. {
  1834. opcode = 0xA0 | (direction ^ TOREGBIT) | segword;
  1835. lastexp = target.displ;
  1836. if ((source.size = displsize(&target)) != defsize)
  1837. aprefix = 0x67;
  1838. mcount += source.size;
  1839. needcpu(source.size==4?3:0);
  1840. }
  1841. else if (source.base == NOREG)
  1842. {
  1843. if (target.indcount == 0x0)
  1844. opcode = 0xB0 | (segword << 0x3) | rm[target.base];
  1845. else
  1846. {
  1847. buildea(&target);
  1848. opcode = 0xC6 | segword;
  1849. }
  1850. buildimm(&source, FALSE);
  1851. }
  1852. else
  1853. {
  1854. if (isspecreg(source.base))
  1855. {
  1856. needcpu(3);
  1857. page = PAGE1_OPCODE;
  1858. ++mcount;
  1859. opcode = 0x0;
  1860. }
  1861. opcode |= direction | segword;
  1862. buildregular();
  1863. }
  1864. }
  1865. }
  1866. /* MOVSX, MOVZX */
  1867. PUBLIC void mmovx()
  1868. {
  1869. ++mcount;
  1870. Gv(&source);
  1871. getcomma();
  1872. Ex(&target);
  1873. if (target.size == 0x0)
  1874. kgerror(SIZE_UNK);
  1875. if (target.size > 0x2)
  1876. kgerror(ILL_SIZE);
  1877. oprefix = 0x0;
  1878. if (source.size != defsize)
  1879. oprefix = 0x66;
  1880. buildsegword(&target);
  1881. opcode |= segword;
  1882. buildregular();
  1883. }
  1884. /* NEG, NOT */
  1885. PUBLIC void mnegnot()
  1886. {
  1887. ++mcount;
  1888. Ex(&target);
  1889. buildsegword(&target);
  1890. buildunary(0xF6 | segword);
  1891. }
  1892. /* OUT */
  1893. PUBLIC void mout()
  1894. {
  1895. ++mcount;
  1896. if (opcode & WORDBIT) /* outw; outd not supported */
  1897. mnsize = 0x2;
  1898. if (sym == EOLSYM && mnsize != 0x0)
  1899. source.size = mnsize;
  1900. else
  1901. {
  1902. if (!getdxreg(&target))
  1903. {
  1904. getimmed(&target, 0x1);
  1905. opcode -= 0x8;
  1906. }
  1907. if (sym == COMMA)
  1908. {
  1909. getsym();
  1910. if (!getaccumreg(&source))
  1911. kgerror(AL_AX_EAX_EXP);
  1912. else if (mnsize != 0x0 && regsize[source.base] != mnsize)
  1913. error(MISMATCHED_SIZE);
  1914. }
  1915. else
  1916. source.size = regsize[source.base = mnsize < 0x2 ? ALREG : AXREG];
  1917. opcode |= regsegword[source.base];
  1918. }
  1919. if (source.size > 0x1 && source.size != defsize)
  1920. oprefix = 0x66;
  1921. }
  1922. /* POP, PUSH */
  1923. PUBLIC void mpushpop()
  1924. {
  1925. opcode_t oldopcode;
  1926. ++mcount;
  1927. getea(&target);
  1928. buildsegword(&target);
  1929. notbytesize(&target);
  1930. if ((oldopcode = opcode) == POP_OPCODE)
  1931. {
  1932. notimmed(&target);
  1933. if (target.base == CSREG)
  1934. kgerror(ILL_SEG_REG);
  1935. }
  1936. if (mcount != 0x0)
  1937. {
  1938. if (target.indcount == 0x0)
  1939. {
  1940. if (segword == SEGMOV)
  1941. {
  1942. switch (target.base)
  1943. {
  1944. case CSREG:
  1945. opcode = 0x0E;
  1946. break;
  1947. case DSREG:
  1948. opcode = 0x1E;
  1949. break;
  1950. case ESREG:
  1951. opcode = 0x06;
  1952. break;
  1953. case SSREG:
  1954. opcode = 0x16;
  1955. break;
  1956. case FSREG:
  1957. opcode = 0xA0;
  1958. page = PAGE1_OPCODE;
  1959. ++mcount;
  1960. break;
  1961. case GSREG:
  1962. opcode = 0xA8;
  1963. page = PAGE1_OPCODE;
  1964. ++mcount;
  1965. break;
  1966. }
  1967. if (oldopcode == POP_OPCODE)
  1968. ++opcode;
  1969. }
  1970. else if (target.base != NOREG)
  1971. {
  1972. opcode = 0x50 | rm[target.base];
  1973. if (oldopcode == POP_OPCODE)
  1974. opcode |= 0x8;
  1975. }
  1976. else
  1977. {
  1978. needcpu(1); /* On 8086 PUSH does not allow immediate */
  1979. opcode = 0x68;
  1980. if (oldopcode == POP_OPCODE)
  1981. ++opcode;
  1982. buildimm(&target, TRUE);
  1983. }
  1984. }
  1985. else
  1986. {
  1987. buildea(&target);
  1988. if (oldopcode == PUSH_OPCODE)
  1989. postb |= 0x6 << REG_SHIFT;
  1990. }
  1991. }
  1992. }
  1993. /* RET, RETF */
  1994. PUBLIC void mret()
  1995. {
  1996. ++mcount;
  1997. if (sym != EOLSYM)
  1998. {
  1999. --opcode;
  2000. getimmed(&target, 0x2);
  2001. }
  2002. }
  2003. /* SEG CS/DS/ES/FS/GS/SS */
  2004. PUBLIC void mseg()
  2005. {
  2006. reg_pt reg;
  2007. if (regsegword[reg = regchk()] != SEGMOV)
  2008. error(SEG_REG_REQ);
  2009. else
  2010. {
  2011. getsym();
  2012. ++mcount;
  2013. opcode = (segoverride - CSREG)[reg];
  2014. }
  2015. }
  2016. /* SETCC */
  2017. PUBLIC void msetcc()
  2018. {
  2019. ++mcount;
  2020. Eb(&target);
  2021. if (mcount != 0x0)
  2022. buildea(&target);
  2023. }
  2024. /* SHLD, SHRD */
  2025. PUBLIC void mshdouble()
  2026. {
  2027. needcpu(3);
  2028. ++mcount;
  2029. Ev(&target);
  2030. getcomma();
  2031. Gv(&source);
  2032. yes_samesize();
  2033. buildregular();
  2034. getshift(&source2);
  2035. lastexp = target.displ; /* getshift() wiped it out */
  2036. if (mcount != 0x0)
  2037. {
  2038. if (source2.base == CLREG)
  2039. opcode |= 0x1;
  2040. else
  2041. {
  2042. source2.size = 0x1;
  2043. buildimm(&source2, FALSE);
  2044. }
  2045. }
  2046. }
  2047. /*
  2048. TEST
  2049. Similar to the regular group1 operators.
  2050. It does not allow the sign extended immediate byte forms
  2051. and does not use the relevant direction bit.
  2052. */
  2053. PUBLIC void mtest()
  2054. {
  2055. getbinary();
  2056. notsegorspecreg(&source);
  2057. if (source.base == NOREG)
  2058. {
  2059. if (mcount != 0x0)
  2060. {
  2061. if (target.indcount == 0x0
  2062. && (target.base == ALREG || target.base == AXREG
  2063. || target.base == EAXREG))
  2064. opcode = 0xA8 | segword;
  2065. else
  2066. {
  2067. buildea(&target);
  2068. opcode = 0xF6 | segword;
  2069. }
  2070. }
  2071. buildimm(&source, FALSE);
  2072. }
  2073. else
  2074. {
  2075. opcode |= segword;
  2076. buildregular();
  2077. }
  2078. }
  2079. /*
  2080. XCHG
  2081. Similar to the regular group1 operators.
  2082. It does not allow any of the immediate forms
  2083. and does not use the irrelevant direction bit.
  2084. */
  2085. PUBLIC void mxchg()
  2086. {
  2087. getbinary();
  2088. notimmed(&source);
  2089. notsegorspecreg(&source);
  2090. if (target.indcount == 0x0)
  2091. {
  2092. if (target.base == AXREG || target.base == EAXREG)
  2093. {
  2094. opcode = 0x90 + rm[source.base];
  2095. return;
  2096. }
  2097. if (source.base == AXREG || source.base == EAXREG)
  2098. {
  2099. opcode = 0x90 + rm[target.base];
  2100. return;
  2101. }
  2102. }
  2103. opcode |= segword;
  2104. buildregular();
  2105. }
  2106. PRIVATE void notbytesize(eap)
  2107. register struct ea_s *eap;
  2108. {
  2109. if (eap->size == 0x1)
  2110. kgerror(ILL_SIZE);
  2111. }
  2112. PRIVATE void notimmed(eap)
  2113. register struct ea_s *eap;
  2114. {
  2115. if (eap->indcount == 0x0 && eap->base == NOREG)
  2116. kgerror(ILL_IMM_MODE);
  2117. }
  2118. PRIVATE void notindirect(eap)
  2119. register struct ea_s *eap;
  2120. {
  2121. if (eap->indcount != 0x0)
  2122. kgerror(ILL_IND);
  2123. }
  2124. PRIVATE void notsegorspecreg(eap)
  2125. register struct ea_s *eap;
  2126. {
  2127. if (regsegword[eap->base] >= SEGMOV)
  2128. kgerror(ILLREG);
  2129. }
  2130. PRIVATE void yesimmed(eap)
  2131. register struct ea_s *eap;
  2132. {
  2133. if (eap->indcount == 0x1)
  2134. eap->indcount = 0x0;
  2135. if (eap->indcount != 0x0 || eap->base != NOREG)
  2136. kgerror(IMM_REQ);
  2137. }
  2138. PRIVATE void yes_samesize()
  2139. {
  2140. if (target.size == 0x0)
  2141. target.size = source.size;
  2142. else if (source.size != 0x0 && target.size != source.size)
  2143. kgerror(MISMATCHED_SIZE);
  2144. }
  2145. #endif /* I80386 */
  2146. #ifdef MC6809
  2147. /* 6809 opcode constants */
  2148. /* bits for indexed addressing */
  2149. #define INDIRECTBIT 0x10
  2150. #define INDEXBIT 0x80 /* except 5 bit offset */
  2151. #define PCRELBIT 0x04 /* PC relative (in certain cases) */
  2152. #define RRBITS 0x60 /* register select bits */
  2153. PRIVATE opcode_t rrindex[] = /* register and index bits for indexed adr */
  2154. {
  2155. 0x60 | INDEXBIT, /* S */
  2156. 0x40 | INDEXBIT, /* U */
  2157. 0x00 | INDEXBIT, /* X */
  2158. 0x20 | INDEXBIT, /* Y */
  2159. PCRELBIT | INDEXBIT, /* PC */
  2160. };
  2161. PRIVATE opcode_t pushpull[] = /* push/pull codes */
  2162. {
  2163. 0x40, /* S */
  2164. 0x40, /* U */
  2165. 0x10, /* X */
  2166. 0x20, /* Y */
  2167. 0x80, /* PC */
  2168. 0x02, /* A */
  2169. 0x04, /* B */
  2170. 0x01, /* CC */
  2171. 0x08, /* DP */
  2172. 0x06, /* D */
  2173. };
  2174. PRIVATE opcode_t tfrexg1[] = /* transfer/exchange codes for source reg */
  2175. {
  2176. 0x40, /* S */
  2177. 0x30, /* U */
  2178. 0x10, /* X */
  2179. 0x20, /* Y */
  2180. 0x50, /* PC */
  2181. 0x80, /* A */
  2182. 0x90, /* B */
  2183. 0xA0, /* CC */
  2184. 0xB0, /* DP */
  2185. 0x00, /* D */
  2186. };
  2187. PRIVATE opcode_t tfrexg2[] = /* transfer/exchange codes for target reg */
  2188. {
  2189. 0x04, /* S */
  2190. 0x03, /* U */
  2191. 0x01, /* X */
  2192. 0x02, /* Y */
  2193. 0x05, /* PC */
  2194. 0x08, /* A */
  2195. 0x09, /* B */
  2196. 0x0A, /* CC */
  2197. 0x0B, /* DP */
  2198. 0x00, /* D */
  2199. };
  2200. FORWARD void checkpostinc P((void));
  2201. FORWARD void doaltind P((void));
  2202. FORWARD void do1altind P((void));
  2203. FORWARD void fixupind P((void));
  2204. FORWARD void getindexnopost P((void));
  2205. FORWARD void inderror P((char * err_str));
  2206. FORWARD reg_pt indreg P((reg_pt maxindex));
  2207. FORWARD void predec1 P((void));
  2208. FORWARD void sustack P((reg_pt stackreg));
  2209. PRIVATE void checkpostinc()
  2210. {
  2211. if (sym == ADDOP)
  2212. {
  2213. if (postb & INDIRECTBIT)
  2214. inderror(ILLMOD); /* single-inc indirect illegal */
  2215. else
  2216. {
  2217. lastexp.offset &= 0xFF00; /* for printing if postbyte is 0: ,X+ */
  2218. getsym();
  2219. }
  2220. }
  2221. else if (sym == POSTINCOP)
  2222. {
  2223. postb |= 0x1;
  2224. getsym();
  2225. }
  2226. else
  2227. postb |= 0x4;
  2228. fixupind();
  2229. }
  2230. /* common code for all-mode ops, alterable-mode ops, indexed ops */
  2231. PRIVATE void doaltind()
  2232. {
  2233. mcount += 0x2;
  2234. if (sym == LBRACKET)
  2235. {
  2236. postb = INDIRECTBIT;
  2237. getsym();
  2238. do1altind();
  2239. if (sym != RBRACKET)
  2240. error(RBEXP);
  2241. }
  2242. else
  2243. do1altind();
  2244. }
  2245. PRIVATE void do1altind()
  2246. {
  2247. bool_t byteflag; /* set if direct or short indexed adr forced */
  2248. char *oldlineptr;
  2249. char *oldsymname;
  2250. reg_pt reg;
  2251. bool_t wordflag; /* set if extended or long indexed adr forced*/
  2252. if ((reg = regchk()) != NOREG)
  2253. {
  2254. switch (reg)
  2255. {
  2256. case AREG:
  2257. postb |= 0x86;
  2258. break;
  2259. case BREG:
  2260. postb |= 0x85;
  2261. break;
  2262. case DREG:
  2263. postb |= 0x8B;
  2264. break;
  2265. default:
  2266. if (indreg(MAXINDREG) != NOREG)
  2267. checkpostinc();
  2268. return;
  2269. }
  2270. getsym();
  2271. if (sym != COMMA)
  2272. inderror(COMEXP);
  2273. else
  2274. getindexnopost();
  2275. return;
  2276. }
  2277. else if (sym == SUBOP) /* could be -R or - in expression */
  2278. {
  2279. oldlineptr = lineptr; /* save state */
  2280. oldsymname = symname;
  2281. getsym();
  2282. reg = regchk();
  2283. lineptr = oldlineptr;
  2284. symname = oldsymname;
  2285. if (reg != NOREG)
  2286. {
  2287. predec1(); /* it's -R */
  2288. return;
  2289. }
  2290. sym = SUBOP;
  2291. }
  2292. else if (sym == COMMA)
  2293. {
  2294. postb |= INDEXBIT;
  2295. getsym();
  2296. if (sym == SUBOP)
  2297. {
  2298. predec1();
  2299. return;
  2300. }
  2301. else if (sym != PREDECOP)
  2302. {
  2303. if (indreg(MAXINDREG) != NOREG)
  2304. checkpostinc();
  2305. return;
  2306. }
  2307. }
  2308. if (sym == PREDECOP)
  2309. {
  2310. postb |= 0x83;
  2311. getindexnopost();
  2312. return;
  2313. }
  2314. /* should have expression */
  2315. wordflag = byteflag = FALSE;
  2316. if (sym == LESSTHAN)
  2317. {
  2318. /* context-sensitive, LESSTHAN means byte-sized here */
  2319. byteflag = TRUE;
  2320. getsym();
  2321. }
  2322. else if (sym == GREATERTHAN)
  2323. {
  2324. /* context-sensitive, GREATERTHAN means word-sized here */
  2325. wordflag = TRUE;
  2326. getsym();
  2327. }
  2328. expres();
  2329. if (sym == COMMA)
  2330. { /* offset from register */
  2331. getsym();
  2332. if ((reg = indreg(PCREG)) == NOREG)
  2333. return;
  2334. postb |= 0x8; /* default 8 bit offset */
  2335. if (reg == PCREG)
  2336. {
  2337. reldata();
  2338. if (!(lastexp.data & (RELBIT | UNDBIT)))
  2339. {
  2340. lastexp.offset = lastexp.offset - lc;
  2341. if (page != 0x0)
  2342. lastexp.offset -= 0x4; /* extra for instruction */
  2343. else
  2344. lastexp.offset -= 0x3; /* 3 byte instruction
  2345. assuming 8 bit offset */
  2346. }
  2347. }
  2348. if (byteflag)
  2349. {
  2350. if (!(lastexp.data & (RELBIT | UNDBIT)) &&
  2351. !is8bitsignedoffset(lastexp.offset))
  2352. error(ABOUNDS); /* forced short form is impossible */
  2353. ++mcount;
  2354. }
  2355. else if (wordflag || lastexp.data & (FORBIT | RELBIT | UNDBIT) ||
  2356. !is8bitsignedoffset(lastexp.offset))
  2357. { /* 16 bit offset */
  2358. if (postb & PCRELBIT && !(lastexp.data & RELBIT))
  2359. --lastexp.offset; /* instruction 1 longer than already
  2360. allowed */
  2361. postb |= 0x1;
  2362. mcount += 0x2;
  2363. }
  2364. else if (!(postb & PCRELBIT) &&
  2365. (offset_t) (lastexp.offset + 0x10) < 0x20 &&
  2366. !(postb & INDIRECTBIT && lastexp.offset != 0x0))
  2367. { /* 5 bit offset */
  2368. postb &= RRBITS | INDIRECTBIT;
  2369. if (lastexp.offset == 0x0)
  2370. postb |= 0x84; /* index with zero offset */
  2371. else
  2372. postb |= (lastexp.offset & 0x1F);
  2373. }
  2374. else /* 8 bit offset */
  2375. ++mcount;
  2376. fixupind();
  2377. }
  2378. else if (postb & INDIRECTBIT)
  2379. { /* extended indirect */
  2380. postb = 0x9F;
  2381. mcount += 0x2;
  2382. fixupind();
  2383. }
  2384. else if (postb & INDEXBIT)
  2385. inderror(ILLMOD); /* e.g. LEAX $10 */
  2386. else
  2387. {
  2388. if (byteflag || (!wordflag && !(lastexp.data & (FORBIT | RELBIT)) &&
  2389. (lastexp.offset >> 0x8) == dirpag))
  2390. { /* direct addressing */
  2391. if (opcode >= 0x80)
  2392. opcode |= 0x10;
  2393. }
  2394. else /* extended addressing */
  2395. {
  2396. if (opcode < 0x80)
  2397. opcode |= 0x70;
  2398. else
  2399. opcode |= 0x30;
  2400. ++mcount;
  2401. if (pass2 && (opcode == JSR_OPCODE || opcode == JMP_OPCODE) &&
  2402. !(lastexp.data & IMPBIT) &&
  2403. lastexp.offset + (0x81 - 0x3) < 0x101)
  2404. /* JSR or JMP could be done with BSR or BRA */
  2405. warning(SHORTB);
  2406. }
  2407. }
  2408. }
  2409. PRIVATE void fixupind()
  2410. {
  2411. if ((opcode & 0x30) == 0x0) /* change all but LEA opcodes */
  2412. {
  2413. if (opcode < 0x80)
  2414. opcode |= 0x60;
  2415. else
  2416. opcode |= 0x20;
  2417. }
  2418. }
  2419. PRIVATE void getindexnopost()
  2420. {
  2421. getsym();
  2422. if (indreg(MAXINDREG) != NOREG)
  2423. fixupind();
  2424. }
  2425. PRIVATE void inderror(err_str)
  2426. char * err_str;
  2427. {
  2428. error(err_str);
  2429. if (postb & INDIRECTBIT)
  2430. sym = RBRACKET; /* fake right bracket to kill further errors */
  2431. fixupind();
  2432. }
  2433. /* check current symbol is an index register (possibly excepting PC) */
  2434. /* if so, modify postbyte RR and INDEXBIT for it, get next sym, return TRUE */
  2435. /* otherwise generate error, return FALSE */
  2436. PRIVATE reg_pt indreg(maxindex)
  2437. reg_pt maxindex;
  2438. {
  2439. reg_pt reg;
  2440. if ((reg = regchk()) == NOREG)
  2441. inderror(IREGEXP);
  2442. else if (reg > maxindex)
  2443. {
  2444. inderror(ILLREG);
  2445. reg = NOREG;
  2446. }
  2447. else
  2448. {
  2449. postb |= rrindex[reg];
  2450. getsym();
  2451. }
  2452. return reg;
  2453. }
  2454. /* all-mode ops */
  2455. PUBLIC void mall()
  2456. {
  2457. if (sym == IMMEDIATE)
  2458. mimmed();
  2459. else
  2460. malter();
  2461. }
  2462. /* alterable mode ops */
  2463. PUBLIC void malter()
  2464. {
  2465. postb = 0x0; /* not yet indexed or indirect */
  2466. doaltind();
  2467. }
  2468. /* indexed mode ops */
  2469. PUBLIC void mindex()
  2470. {
  2471. postb = INDEXBIT; /* indexed but not yet indirect */
  2472. doaltind();
  2473. }
  2474. /* immediate ops */
  2475. PUBLIC void mimmed()
  2476. {
  2477. opcode_t nybble;
  2478. mcount += 0x2;
  2479. if (sym != IMMEDIATE)
  2480. error(ILLMOD);
  2481. else
  2482. {
  2483. if (opcode >= 0x80 && ((nybble = opcode & 0xF) == 0x3 ||
  2484. nybble == 0xC || nybble >= 0xE))
  2485. ++mcount; /* magic for long immediate */
  2486. symexpres();
  2487. if (pass2 && mcount <= 0x2)
  2488. {
  2489. chkabs();
  2490. checkdatabounds();
  2491. }
  2492. }
  2493. }
  2494. /* long branches */
  2495. PUBLIC void mlong()
  2496. {
  2497. mcount += 0x3; /* may be 0x0 or 0x1 here */
  2498. expres();
  2499. segadj();
  2500. if (pass2)
  2501. {
  2502. reldata();
  2503. if (!(lastexp.data & (RELBIT | UNDBIT)))
  2504. {
  2505. lastexp.offset = lastexp.offset - lc - lcjump;
  2506. if ( last_pass<2 && !(lastexp.data & IMPBIT) &&
  2507. lastexp.offset + 0x81 < 0x101)
  2508. warning(SHORTB); /* -0x81 to 0x7F, warning */
  2509. }
  2510. }
  2511. }
  2512. /* PSHS and PULS */
  2513. PUBLIC void msstak()
  2514. {
  2515. sustack(SREG);
  2516. }
  2517. /* TFR and EXG */
  2518. PUBLIC void mswap()
  2519. {
  2520. reg_pt reg;
  2521. mcount = 0x2;
  2522. if ((reg = regchk()) == NOREG)
  2523. error(REGEXP);
  2524. else
  2525. {
  2526. postb = tfrexg1[reg];
  2527. getsym();
  2528. if (sym != COMMA)
  2529. error(COMEXP);
  2530. else
  2531. {
  2532. getsym();
  2533. if ((reg = regchk()) == NOREG)
  2534. error(REGEXP);
  2535. else if ((postb |= tfrexg2[reg])
  2536. & 0x88 && (postb & 0x88) != 0x88)
  2537. error(ILLREG); /* registers not of same size */
  2538. }
  2539. }
  2540. }
  2541. /* PSHU and PULU */
  2542. PUBLIC void mustak()
  2543. {
  2544. sustack(UREG);
  2545. }
  2546. PRIVATE void predec1()
  2547. {
  2548. if (postb & INDIRECTBIT)
  2549. inderror(ILLMOD); /* single-dec indirect illegal */
  2550. else
  2551. {
  2552. postb |= 0x82;
  2553. getindexnopost();
  2554. }
  2555. }
  2556. /* common routine for PSHS/PULS/PSHU/PULU */
  2557. PRIVATE void sustack(stackreg)
  2558. reg_pt stackreg;
  2559. {
  2560. reg_pt reg;
  2561. mcount = 0x2;
  2562. while ((reg = regchk()) != NOREG)
  2563. {
  2564. if (reg == stackreg)
  2565. {
  2566. error(ILLREG); /* cannot stack self */
  2567. break;
  2568. }
  2569. postb |= pushpull[reg];
  2570. getsym();
  2571. if (sym != COMMA)
  2572. break;
  2573. getsym();
  2574. }
  2575. }
  2576. #endif /* MC6809 */
  2577. /* routines common to all processors */
  2578. PUBLIC void getcomma()
  2579. {
  2580. if (sym != COMMA)
  2581. error(COMEXP);
  2582. else
  2583. getsym();
  2584. }
  2585. /* inherent ops */
  2586. /* for I80386 */
  2587. /* AAA, AAS, CLC, CLD, CLI, CLTS, CMC, CMPSB, DAA, DAS, HLT, INTO, INSB, */
  2588. /* INVD, */
  2589. /* LAHF, LEAVE, LOCK, LODSB, MOVSB, NOP, OUTSB, REP, REPE, REPNE, REPNZ, */
  2590. /* REPZ, SAHF, SCASB, STC, STD, STI, STOSB, WAIT, WBINVD */
  2591. PUBLIC void minher()
  2592. {
  2593. ++mcount;
  2594. }
  2595. /* short branches */
  2596. PUBLIC void mshort()
  2597. {
  2598. nonimpexpres();
  2599. mshort2();
  2600. }
  2601. PRIVATE void mshort2()
  2602. {
  2603. mcount += 0x2;
  2604. if (pass2)
  2605. {
  2606. reldata();
  2607. if (lastexp.data & RELBIT)
  2608. showrelbad();
  2609. else if (!(lastexp.data & UNDBIT))
  2610. {
  2611. lastexp.offset = lastexp.offset - lc - mcount;
  2612. if (!is8bitsignedoffset(lastexp.offset))
  2613. error(ABOUNDS);
  2614. }
  2615. }
  2616. }
  2617. /* check if current symbol is a register, return register number or NOREG */
  2618. PRIVATE reg_pt regchk()
  2619. {
  2620. register struct sym_s *symptr;
  2621. if (sym == IDENT)
  2622. {
  2623. if ((symptr = gsymptr)->type & MNREGBIT)
  2624. {
  2625. if (symptr->data & REGBIT)
  2626. {
  2627. int regno = symptr->value_reg_or_op.reg;
  2628. #ifdef I80386
  2629. if (regno == ST0REG && !fpreg_allowed)
  2630. error(FP_REG_NOT_ALLOWED);
  2631. /* Check cpu */
  2632. needcpu((regno==FSREG||regno==GSREG)?3:0);
  2633. needcpu((regno>=EAXREG && regno<=ESPREG)?3:0);
  2634. needcpu((regno>=CR0REG && regno<=TR7REG)?3:0);
  2635. #endif
  2636. return regno;
  2637. }
  2638. }
  2639. else
  2640. if( last_pass == 1 )
  2641. if (!(symptr->type & (LABIT | MACBIT | VARBIT)))
  2642. symptr->data |= FORBIT; /* show seen in advance */
  2643. }
  2644. return NOREG;
  2645. }
  2646. /* convert lastexp.data for PC relative */
  2647. PRIVATE void reldata()
  2648. {
  2649. if ((lastexp.data ^ lcdata) & (IMPBIT | RELBIT | SEGM))
  2650. {
  2651. if ((lastexp.data ^ lcdata) & RELBIT)
  2652. showrelbad(); /* rel - abs is weird, abs - rel is bad */
  2653. else
  2654. {
  2655. pcrflag = OBJ_R_MASK;
  2656. lastexp.data = (lcdata & ~SEGM) | lastexp.data | RELBIT;
  2657. /* segment is that of lastexp.data */
  2658. }
  2659. }
  2660. else /* same file, segment and relocation */
  2661. lastexp.data = (lastexp.data | lcdata) & ~(RELBIT | SEGM);
  2662. }
  2663. PRIVATE void segadj()
  2664. {
  2665. if ((lastexp.data & UNDBIT) && textseg >= 0 )
  2666. {
  2667. lastexp.sym->data &= ~SEGM;
  2668. lastexp.sym->data |= (lcdata & SEGM);
  2669. }
  2670. }