0009-USB-Armory-MkII-support.patch 15 KB

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  1. From 849c3ad55d9fcf00cb909e8f19139b939a22132c Mon Sep 17 00:00:00 2001
  2. From: Kevin Mihelich <kevin@archlinuxarm.org>
  3. Date: Sun, 11 Aug 2019 12:34:17 -0600
  4. Subject: [PATCH 9/9] USB Armory MkII support
  5. ---
  6. arch/arm/boot/dts/Makefile | 2 +
  7. arch/arm/boot/dts/imx6ul-usbarmory.dts | 255 +++++++++++++++++++++++
  8. arch/arm/boot/dts/imx6ull-usbarmory.dts | 256 ++++++++++++++++++++++++
  9. 3 files changed, 513 insertions(+)
  10. create mode 100644 arch/arm/boot/dts/imx6ul-usbarmory.dts
  11. create mode 100644 arch/arm/boot/dts/imx6ull-usbarmory.dts
  12. diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
  13. index 9f10323ecfde..ab24e8e9d0c2 100644
  14. --- a/arch/arm/boot/dts/Makefile
  15. +++ b/arch/arm/boot/dts/Makefile
  16. @@ -585,10 +585,12 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
  17. imx6ul-tx6ul-0010.dtb \
  18. imx6ul-tx6ul-0011.dtb \
  19. imx6ul-tx6ul-mainboard.dtb \
  20. + imx6ul-usbarmory.dtb \
  21. imx6ull-14x14-evk.dtb \
  22. imx6ull-colibri-eval-v3.dtb \
  23. imx6ull-colibri-wifi-eval-v3.dtb \
  24. imx6ull-opos6uldev.dtb \
  25. + imx6ull-usbarmory.dtb \
  26. imx6ull-phytec-segin-ff-rdk-nand.dtb \
  27. imx6ull-phytec-segin-ff-rdk-emmc.dtb \
  28. imx6ull-phytec-segin-lc-rdk-nand.dtb \
  29. diff --git a/arch/arm/boot/dts/imx6ul-usbarmory.dts b/arch/arm/boot/dts/imx6ul-usbarmory.dts
  30. new file mode 100644
  31. index 000000000000..3936ef8a64f1
  32. --- /dev/null
  33. +++ b/arch/arm/boot/dts/imx6ul-usbarmory.dts
  34. @@ -0,0 +1,255 @@
  35. +/*
  36. + * USB armory Mk II device tree file
  37. + * https://inversepath.com/usbarmory
  38. + *
  39. + * Copyright (C) 2019, F-Secure Corporation
  40. + * Andrej Rosano <andrej.rosano@f-secure.com>
  41. + *
  42. + * This file is dual-licensed: you can use it either under the terms
  43. + * of the GPL or the X11 license, at your option. Note that this dual
  44. + * licensing only applies to this file, and not this project as a
  45. + * whole.
  46. + *
  47. + * a) This file is free software; you can redistribute it and/or
  48. + * modify it under the terms of the GNU General Public License as
  49. + * published by the Free Software Foundation; either version 2 of the
  50. + * License, or (at your option) any later version.
  51. + *
  52. + * This file is distributed in the hope that it will be useful,
  53. + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  54. + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  55. + * GNU General Public License for more details.
  56. + *
  57. + * Or, alternatively,
  58. + *
  59. + * b) Permission is hereby granted, free of charge, to any person
  60. + * obtaining a copy of this software and associated documentation
  61. + * files (the "Software"), to deal in the Software without
  62. + * restriction, including without limitation the rights to use,
  63. + * copy, modify, merge, publish, distribute, sublicense, and/or
  64. + * sell copies of the Software, and to permit persons to whom the
  65. + * Software is furnished to do so, subject to the following
  66. + * conditions:
  67. + *
  68. + * The above copyright notice and this permission notice shall be
  69. + * included in all copies or substantial portions of the Software.
  70. + *
  71. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  72. + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  73. + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  74. + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  75. + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  76. + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  77. + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  78. + * OTHER DEALINGS IN THE SOFTWARE.
  79. + */
  80. +
  81. +/dts-v1/;
  82. +
  83. +#include "imx6ul.dtsi"
  84. +
  85. +/ {
  86. + model = "F-Secure USB armory Mk II";
  87. + compatible = "inversepath,imx6ul-usbarmory-mkII", "fsl,imx6ul";
  88. +
  89. + chosen {
  90. + stdout-path = &uart2;
  91. + };
  92. +
  93. + memory {
  94. + reg = <0x80000000 0x20000000>;
  95. + };
  96. +
  97. + leds {
  98. + compatible = "gpio-leds";
  99. + pinctrl-names = "default";
  100. + pinctrl-0 = <&pinctrl_led>;
  101. +
  102. + led-white {
  103. + label = "LED_WHITE";
  104. + gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
  105. + linux,default-trigger = "heartbeat";
  106. + };
  107. +
  108. + led-blue {
  109. + label = "LED_BLUE";
  110. + gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
  111. + };
  112. + };
  113. +
  114. + regulators {
  115. + compatible = "simple-bus";
  116. + #address-cells = <1>;
  117. + #size-cells = <0>;
  118. +
  119. + reg_sd1_vmmc: sd1_regulator {
  120. + compatible = "regulator-fixed";
  121. + regulator-name = "VSD_3V3";
  122. + regulator-min-microvolt = <3300000>;
  123. + regulator-max-microvolt = <3300000>;
  124. + };
  125. + };
  126. +};
  127. +
  128. +&uart1 {
  129. + pinctrl-names = "default";
  130. + pinctrl-0 = <&pinctrl_bluetooth>;
  131. + uart-has-rtscts;
  132. + status = "okay";
  133. +};
  134. +
  135. +&uart2 {
  136. + pinctrl-names = "default";
  137. + pinctrl-0 = <&pinctrl_uart2>;
  138. + status = "okay";
  139. +};
  140. +
  141. +&usdhc1 {
  142. + pinctrl-names = "default";
  143. + pinctrl-0 = <&pinctrl_usdhc1>;
  144. + no-1-8-v;
  145. + keep-power-in-suspend;
  146. + wakeup-source;
  147. + status = "okay";
  148. +};
  149. +
  150. +&usdhc2 {
  151. + pinctrl-names = "default";
  152. + pinctrl-0 = <&pinctrl_usdhc2>;
  153. + non-removable;
  154. + status = "okay";
  155. +};
  156. +
  157. +&i2c1 {
  158. + pinctrl-0 = <&pinctrl_i2c1>;
  159. + status = "okay";
  160. +};
  161. +
  162. +&iomuxc {
  163. + pinctrl_uart2: uart2grp {
  164. + fsl,pins = <
  165. + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
  166. + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
  167. + >;
  168. + };
  169. +
  170. + pinctrl_bluetooth: uart1grp {
  171. + fsl,pins = <
  172. + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b0 /* BT_UART_TX */
  173. + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b0 /* BT_UART_RX */
  174. + MX6UL_PAD_UART1_CTS_B__UART1_DCE_CTS 0x1b0b0 /* BT_UART_CTS */
  175. + MX6UL_PAD_GPIO1_IO07__UART1_DCE_RTS 0x130b0 /* BT_UART_RTS */
  176. + MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x1f020 /* BT_UART_DSR */
  177. + MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x10020 /* BT_UART_DTR */
  178. + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x1f020 /* BT_SWDCLK */
  179. + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1f020 /* BT_SWDIO */
  180. + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x1f020 /* BT_RESET */
  181. + MX6UL_PAD_UART3_RTS_B__GPIO1_IO27 0x1f020 /* BT_SWITCH_1 */
  182. + MX6UL_PAD_UART3_CTS_B__GPIO1_IO26 0x1f020 /* BT_SWITCH_2 */
  183. + >;
  184. + };
  185. +
  186. + pinctrl_i2c1: i2c1grp {
  187. + fsl,pins = <
  188. + MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001b8b0
  189. + MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x4001b8b0
  190. + >;
  191. + };
  192. +
  193. + pinctrl_led: ledgrp {
  194. + fsl,pins = <
  195. + MX6UL_PAD_CSI_DATA06__GPIO4_IO27 0x1f020
  196. + MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x1f020
  197. + >;
  198. + };
  199. +
  200. + pinctrl_usdhc1: usdhc1grp {
  201. + fsl,pins = <
  202. + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x1f019
  203. + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x1f019
  204. + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x1f019
  205. + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x1f019
  206. + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x1f019
  207. + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x1f019
  208. + >;
  209. + };
  210. +
  211. + pinctrl_usdhc2: usdhc2grp {
  212. + fsl,pins = <
  213. + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10071
  214. + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
  215. + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
  216. + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
  217. + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
  218. + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
  219. + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
  220. + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
  221. + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
  222. + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
  223. + >;
  224. + };
  225. +};
  226. +
  227. +&aips2 {
  228. + crypto: caam@2140000 {
  229. + compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
  230. + #address-cells = <1>;
  231. + #size-cells = <1>;
  232. + reg = <0x2140000 0x3c000>;
  233. + ranges = <0 0x2140000 0x3c000>;
  234. + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
  235. + clocks = <&clks IMX6UL_CLK_CAAM_IPG>, <&clks IMX6UL_CLK_CAAM_ACLK>,
  236. + <&clks IMX6UL_CLK_CAAM_MEM>;
  237. + clock-names = "ipg", "aclk", "mem";
  238. +
  239. + sec_jr0: jr0@1000 {
  240. + compatible = "fsl,sec-v4.0-job-ring";
  241. + reg = <0x1000 0x1000>;
  242. + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
  243. + };
  244. +
  245. + sec_jr1: jr1@2000 {
  246. + compatible = "fsl,sec-v4.0-job-ring";
  247. + reg = <0x2000 0x1000>;
  248. + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
  249. + };
  250. + sec_jr2: jr2@3000 {
  251. + compatible = "fsl,sec-v4.0-job-ring";
  252. + reg = <0x3000 0x1000>;
  253. + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
  254. + };
  255. + };
  256. +};
  257. +
  258. +/ {
  259. + soc {
  260. + caam_sm: caam-sm@00100000 {
  261. + compatible = "fsl,imx7d-caam-sm", "fsl,imx6q-caam-sm";
  262. + reg = <0x00100000 0x3fff>;
  263. + };
  264. +
  265. + irq_sec_vio: caam_secvio {
  266. + compatible = "fsl,imx7d-caam-secvio", "fsl,imx6q-caam-secvio";
  267. + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
  268. + };
  269. + };
  270. +
  271. + caam_keyblob: caam-keyblob {
  272. + compatible = "fsl,sec-v4.0-keyblob";
  273. + status = "okay";
  274. + };
  275. +};
  276. +
  277. +&usbotg1 {
  278. + dr_mode = "otg";
  279. + disable-over-current;
  280. + tpl-support;
  281. + status = "okay";
  282. +};
  283. +
  284. +&usbotg2 {
  285. + dr_mode = "host";
  286. + disable-over-current;
  287. + tpl-support;
  288. + status = "okay";
  289. +};
  290. diff --git a/arch/arm/boot/dts/imx6ull-usbarmory.dts b/arch/arm/boot/dts/imx6ull-usbarmory.dts
  291. new file mode 100644
  292. index 000000000000..85cf30bff527
  293. --- /dev/null
  294. +++ b/arch/arm/boot/dts/imx6ull-usbarmory.dts
  295. @@ -0,0 +1,256 @@
  296. +/*
  297. + * USB armory Mk II device tree file
  298. + * https://inversepath.com/usbarmory
  299. + *
  300. + * Copyright (C) 2019, F-Secure Corporation
  301. + * Andrej Rosano <andrej.rosano@f-secure.com>
  302. + *
  303. + * This file is dual-licensed: you can use it either under the terms
  304. + * of the GPL or the X11 license, at your option. Note that this dual
  305. + * licensing only applies to this file, and not this project as a
  306. + * whole.
  307. + *
  308. + * a) This file is free software; you can redistribute it and/or
  309. + * modify it under the terms of the GNU General Public License as
  310. + * published by the Free Software Foundation; either version 2 of the
  311. + * License, or (at your option) any later version.
  312. + *
  313. + * This file is distributed in the hope that it will be useful,
  314. + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  315. + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  316. + * GNU General Public License for more details.
  317. + *
  318. + * Or, alternatively,
  319. + *
  320. + * b) Permission is hereby granted, free of charge, to any person
  321. + * obtaining a copy of this software and associated documentation
  322. + * files (the "Software"), to deal in the Software without
  323. + * restriction, including without limitation the rights to use,
  324. + * copy, modify, merge, publish, distribute, sublicense, and/or
  325. + * sell copies of the Software, and to permit persons to whom the
  326. + * Software is furnished to do so, subject to the following
  327. + * conditions:
  328. + *
  329. + * The above copyright notice and this permission notice shall be
  330. + * included in all copies or substantial portions of the Software.
  331. + *
  332. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  333. + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  334. + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  335. + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  336. + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  337. + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  338. + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  339. + * OTHER DEALINGS IN THE SOFTWARE.
  340. + */
  341. +
  342. +/dts-v1/;
  343. +
  344. +#include "imx6ul.dtsi"
  345. +
  346. +/ {
  347. + model = "F-Secure USB armory Mk II";
  348. + compatible = "inversepath,imx6ull-usbarmory-mkII", "fsl,imx6ull";
  349. +
  350. + chosen {
  351. + stdout-path = &uart2;
  352. + };
  353. +
  354. + memory {
  355. + reg = <0x80000000 0x20000000>;
  356. + };
  357. +
  358. + leds {
  359. + compatible = "gpio-leds";
  360. + pinctrl-names = "default";
  361. + pinctrl-0 = <&pinctrl_led>;
  362. +
  363. + led-white {
  364. + label = "LED_WHITE";
  365. + gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
  366. + linux,default-trigger = "heartbeat";
  367. + };
  368. +
  369. + led-blue {
  370. + label = "LED_BLUE";
  371. + gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
  372. + };
  373. + };
  374. +
  375. + regulators {
  376. + compatible = "simple-bus";
  377. + #address-cells = <1>;
  378. + #size-cells = <0>;
  379. +
  380. + reg_sd1_vmmc: sd1_regulator {
  381. + compatible = "regulator-fixed";
  382. + regulator-name = "VSD_3V3";
  383. + regulator-min-microvolt = <3300000>;
  384. + regulator-max-microvolt = <3300000>;
  385. + };
  386. + };
  387. +};
  388. +
  389. +/* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
  390. +/delete-node/ &crypto;
  391. +
  392. +&cpu0 {
  393. + operating-points = <
  394. + /* kHz uV */
  395. + 900000 1275000
  396. + 792000 1225000
  397. + 528000 1175000
  398. + 396000 1025000
  399. + 198000 950000
  400. + >;
  401. + fsl,soc-operating-points = <
  402. + /* KHz uV */
  403. + 900000 1250000
  404. + 792000 1175000
  405. + 528000 1175000
  406. + 396000 1175000
  407. + 198000 1175000
  408. + >;
  409. +};
  410. +
  411. +&uart1 {
  412. + pinctrl-names = "default";
  413. + pinctrl-0 = <&pinctrl_bluetooth>;
  414. + uart-has-rtscts;
  415. + status = "okay";
  416. +};
  417. +
  418. +&uart2 {
  419. + pinctrl-names = "default";
  420. + pinctrl-0 = <&pinctrl_uart2>;
  421. + status = "okay";
  422. +};
  423. +
  424. +&usdhc1 {
  425. + pinctrl-names = "default";
  426. + pinctrl-0 = <&pinctrl_usdhc1>;
  427. + no-1-8-v;
  428. + keep-power-in-suspend;
  429. + wakeup-source;
  430. + status = "okay";
  431. +};
  432. +
  433. +&usdhc2 {
  434. + pinctrl-names = "default";
  435. + pinctrl-0 = <&pinctrl_usdhc2>;
  436. + non-removable;
  437. + status = "okay";
  438. +};
  439. +
  440. +&i2c1 {
  441. + pinctrl-0 = <&pinctrl_i2c1>;
  442. + status = "okay";
  443. +};
  444. +
  445. +&iomuxc {
  446. + pinctrl_uart2: uart2grp {
  447. + fsl,pins = <
  448. + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
  449. + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
  450. + >;
  451. + };
  452. +
  453. + pinctrl_bluetooth: uart1grp {
  454. + fsl,pins = <
  455. + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b0 /* BT_UART_TX */
  456. + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b0 /* BT_UART_RX */
  457. + MX6UL_PAD_UART1_CTS_B__UART1_DCE_CTS 0x1b0b0 /* BT_UART_CTS */
  458. + MX6UL_PAD_GPIO1_IO07__UART1_DCE_RTS 0x130b0 /* BT_UART_RTS */
  459. + MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x1f020 /* BT_UART_DSR */
  460. + MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x10020 /* BT_UART_DTR */
  461. + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x1f020 /* BT_SWDCLK */
  462. + MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1f020 /* BT_SWDIO */
  463. + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x1f020 /* BT_RESET */
  464. + MX6UL_PAD_UART3_RTS_B__GPIO1_IO27 0x1f020 /* BT_SWITCH_1 */
  465. + MX6UL_PAD_UART3_CTS_B__GPIO1_IO26 0x1f020 /* BT_SWITCH_2 */
  466. + >;
  467. + };
  468. +
  469. + pinctrl_i2c1: i2c1grp {
  470. + fsl,pins = <
  471. + MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001b8b0
  472. + MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x4001b8b0
  473. + >;
  474. + };
  475. +
  476. + pinctrl_led: ledgrp {
  477. + fsl,pins = <
  478. + MX6UL_PAD_CSI_DATA06__GPIO4_IO27 0x1f020
  479. + MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x1f020
  480. + >;
  481. + };
  482. +
  483. + pinctrl_usdhc1: usdhc1grp {
  484. + fsl,pins = <
  485. + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x1f019
  486. + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x1f019
  487. + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x1f019
  488. + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x1f019
  489. + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x1f019
  490. + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x1f019
  491. + >;
  492. + };
  493. +
  494. + pinctrl_usdhc2: usdhc2grp {
  495. + fsl,pins = <
  496. + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10071
  497. + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
  498. + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
  499. + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
  500. + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
  501. + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
  502. + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
  503. + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
  504. + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
  505. + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
  506. + >;
  507. + };
  508. +};
  509. +
  510. +/ {
  511. + soc {
  512. + aips3: aips-bus@02200000 {
  513. + compatible = "fsl,aips-bus", "simple-bus";
  514. + #address-cells = <1>;
  515. + #size-cells = <1>;
  516. + reg = <0x02200000 0x100000>;
  517. + ranges;
  518. +
  519. + dcp: dcp@02280000 {
  520. + compatible = "fsl,imx6ull-dcp", "fsl,imx6sl-dcp", "fsl,imx28-dcp";
  521. + reg = <0x02280000 0x4000>;
  522. + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
  523. + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
  524. + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
  525. + clocks = <&clks IMX6ULL_CLK_DCP_CLK>;
  526. + clock-names = "dcp";
  527. + };
  528. +
  529. + rngb: rngb@02284000 {
  530. + compatible = "fsl,imx6sl-rng", "fsl,imx25-rngb", "fsl,imx-rng", "imx-rng";
  531. + reg = <0x02284000 0x4000>;
  532. + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
  533. + clocks = <&clks IMX6UL_CLK_DUMMY>;
  534. + };
  535. + };
  536. + };
  537. +};
  538. +
  539. +&usbotg1 {
  540. + dr_mode = "peripheral";
  541. + disable-over-current;
  542. + tpl-support;
  543. + status = "okay";
  544. +};
  545. +
  546. +&usbotg2 {
  547. + dr_mode = "host";
  548. + disable-over-current;
  549. + tpl-support;
  550. + status = "okay";
  551. +};
  552. --
  553. 2.23.0